ISL6328 Datasheet, PDF (12/33 Pages) Intersil Corporation – Dual PWM Controller For Powering AMD SVI Split-Plane Processors

ISL6328
Timing Diagram
t_PDHUGATE
UGATE
LGATE
t_RUGATE
t_FUGATE
t_FLGATE
t_PDHLGATE
t_RLGATE
Operation
The ISL6328 utilizes a multi-phase architecture to provide a low
cost, space saving power conversion solution for the processor
core voltage. The controller also implements a simple single
phase architecture to provide the Northbridge voltage on the
same chip.
NOTE: All references to VCC refer to the VCC pin or the node that
is tied to the VCC pin. This should not be confused with the bias
voltage as the bias rail can be separated from the VCC node by
an RC filter resistor.
Multi-phase Power Conversion
Microprocessor load current profiles have changed to the point
that the advantages of multi-phase power conversion are
impossible to ignore. The technical challenges associated with
producing a single-phase converter that is both cost-effective and
thermally viable have forced a change to the cost-saving
approach of multi-phase. The ISL6328 controller helps simplify
implementation by integrating vital functions and requiring
minimal external components. The “Controller Block Diagram”
on page 3 provides a top level view of the multi-phase power
conversion using the ISL6328 controller.
Interleaving
The switching of each channel in a multi-phase converter is
timed to be symmetrically out-of-phase with each of the other
channels. In a 3-phase converter, each channel switches 1/3
cycle after the previous channel and 1/3 cycle before the
following channel. As a result, the three-phase converter has a
combined ripple frequency three times greater than the ripple
frequency of any one phase. In addition, the peak-to-peak
amplitude of the combined inductor currents is reduced in
proportion to the number of phases (Equations 2 and 3).
Increased ripple frequency and lower ripple amplitude mean that
the designer can use less per-channel inductance and lower total
output capacitance for any performance specification.
Figure 1 illustrates the multiplicative effect on output ripple
frequency. The three channel currents (IL1, IL2, and IL3) combine
to form the AC ripple current and the DC load current. The ripple
component has three times the ripple frequency of each
individual channel current. Each PWM pulse is terminated 1/3 of
a cycle after the PWM pulse of the previous phase. The
peak-to-peak current for each phase is about 7A, and the DC
components of the inductor currents combine to feed the load.
IL1 + IL2 + IL3, 7A/DIV
IL3, 7A/DIV
PWM3, 5V/DIV
IL2, 7A/DIV
IL1, 7A/DIV
PWM2, 5V/DIV
PWM1, 5V/DIV
1µs/DIV
FIGURE 1. PWM AND INDUCTOR-CURRENT WAVEFORMS FOR
3-PHASE CONVERTER
To understand the reduction of ripple current amplitude in the
multi-phase circuit, examine Equation 2, which represents an
individual channel peak-to-peak inductor current.
I_PP
=
(_---V_{---I--N-----–-----}V_{---O----U----T--})_----V_{---O----U---T-}
L
f_S
V
IN
(EQ. 2)
In Equation 2, V_IN and V_OUT are the input and output voltages
respectively, L is the single-channel inductor value, and f_S is the
switching frequency.
The output capacitors conduct the ripple component of the
inductor current. In the case of multi-phase converters, the
capacitor current is the sum of the ripple currents from each of
the individual channels. Compare Equation 2 to the expression
for the peak-to-peak current after the summation of N
symmetrically phase-shifted inductor currents in Equation 3.
Peak-to-peak ripple current decreases by an amount proportional
to the number of channels. Output-voltage ripple is a function of
capacitance, capacitor equivalent series resistance (ESR), and
inductor ripple current. Reducing the inductor ripple current
allows the designer to use fewer or less costly output capacitors.
I_{C, PP}=
(_---V_{---I--N-----–-----}N_-----V_{----O----U---T---})_---V_{----O---U----T-}
L
f_S
V
I
N
(EQ. 3)
12
FN7621.1
June 7, 2011