ISL6328 Datasheet, PDF (30/33 Pages) Intersil Corporation – Dual PWM Controller For Powering AMD SVI Split-Plane Processors

ISL6328
bulk capacitors as close to the drain of the upper FETs as possible
and minimize the distance to the source of the lower FETs.
Locate the output inductors and output capacitors between the
MOSFETs and the load. The high-frequency output decoupling
capacitors (ceramic) should be placed as close as practicable to the
decoupling target, making use of the shortest connection paths to
any internal planes, such as vias to GND next or on the capacitor
solder pad.
The critical small components include the bypass capacitors
(C_FILTER) for VCC and PVCC, and many of the components
surrounding the controller including the feedback network and
current sense components. Locate the VCC/PVCC bypass
capacitors as close to the ISL6328 as possible. It is especially
important to locate the components associated with the
feedback circuit close to their respective controller pins, since
they belong to a high-impedance circuit loop, sensitive to EMI
pick-up.
A multi-layer printed circuit board is recommended. Figure 26 shows
the connections of the critical components for the converter. Note
that capacitors C_IN and C_OUT could each represent numerous
physical capacitors. Dedicate one solid layer, usually the one
underneath the component side of the board, for a ground plane
and make all critical component ground connections with vias to
this layer. Dedicate another solid layer as a power plane and break
this plane into smaller islands of common voltage levels. Keep the
metal runs from the PHASE terminal to output inductors short. The
power plane should support the input power and output power
nodes. Use copper filled polygons on the top and bottom circuit
layers for the phase nodes. Use the remaining printed circuit layers
for small signal wiring.
Routing UGATE, LGATE, and PHASE Traces
Great attention should be paid to routing the UGATE, LGATE, and PHASE
traces since they drive the power train MOSFETs using short, high
current pulses. It is important to size them as large and as short as
possible to reduce their overall impedance and inductance. They should
be sized to carry at least one ampere of current (0.02” to 0.05”). Going
between layers with vias should also be avoided, but if so, use two vias
for interconnection when possible.
Extra care should be given to the LGATE traces in particular since
keeping their impedance and inductance low helps to significantly
reduce the possibility of shoot-through. It is also important to route
each channels UGATE and PHASE traces in as close proximity as
possible to reduce their inductances.
Current Sense Component
Placement and Trace Routing
One of the most critical aspects of the ISL6328 regulator layout
is the placement of the inductor DCR current sense components
and traces. The R-C current sense components must be placed
as close to their respective ISEN+ and ISEN- pins on the ISL6328
as possible.
The sense traces that connect the R-C sense components to each side
of the output inductors should be routed on the bottom of the board,
away from the noisy switching components located on the top of the
board. These traces should be routed side by side, and they should be
very thin traces. It’s important to route these traces as far away from
any other noisy traces or planes as possible. These traces should pick
up as little noise as possible. These traces should also originate from
the geometric center of the inductor pin pads and that location should
be the single point of contact the trace makes with its respective net.
Thermal Management
For maximum thermal performance in high current, high
switching frequency applications, connecting the thermal GND
pad of the ISL6328 to the ground plane with multiple vias is
recommended. This heat spreading allows the part to achieve
its full thermal potential. It is also recommended that the
controller be placed in a direct path of airflow if possible to help
thermally manage the part.
30
FN7621.1
June 7, 2011