ISL6328 Datasheet, PDF (28/33 Pages) Intersil Corporation – Dual PWM Controller For Powering AMD SVI Split-Plane Processors

ISL6328
At the beginning of the load transient, the output capacitors
supply all of the transient current. The output voltage will initially
deviate by an amount approximated by the voltage drop across
the ESL. As the load current increases, the voltage drop across
the ESR increases linearly until the load current reaches its final
value. The capacitors selected must have sufficiently low ESL and
ESR so that the total output-voltage deviation is less than the
allowable maximum. Neglecting the contribution of inductor
current and regulator response, the output voltage initially
deviates by an amount:
ΔV ≈ ESL ⋅ -^d----ⁱ + ESR ⋅ ΔI
dt
(EQ. 39)
The filter capacitor must have sufficiently low ESL and ESR so
that ΔV < ΔV_MAX.
Most capacitor solutions rely on a mixture of high frequency
capacitors with relatively low capacitance in combination with bulk
capacitors having high capacitance but limited high-frequency
performance. Minimizing the ESL of the high-frequency capacitors
allows them to support the output voltage as the current increases.
Minimizing the ESR of the bulk capacitors allows them to supply the
increased current with less output voltage deviation.
The ESR of the bulk capacitors also creates the majority of the
output-voltage ripple. As the bulk capacitors sink and source the
inductor AC ripple current (see “Interleaving” on page 12 and
Equation 3), a voltage develops across the bulk capacitor ESR
equal to I_C,PP (ESR). Thus, once the output capacitors are
selected, the maximum allowable ripple voltage, V_PP(MAX),
determines the lower limit on the inductance.
⎝⎛ ^{V I N}
–
N
⋅
V_O
U
⎞
T_⎠
⋅
V_OUT
L ≥ ESR ⋅ -------_f--_S-----_â‹---_V---_I--_N-----_â‹---_V---_P----_P---₍--_M----_A----_X---₎-------
(EQ. 40)
Since the capacitors are supplying a decreasing portion of the
load current while the regulator recovers from the transient, the
capacitor voltage becomes slightly depleted. The output
inductors must be capable of assuming the entire load current
before the output voltage decreases more than ΔV_MAX. This
places an upper limit on inductance.
Equation 41 gives the upper limit on L for the cases when the
trailing edge of the current transient causes a greater
output-voltage deviation than the leading edge. Equation 42
addresses the leading edge. Normally, the trailing edge dictates
the selection of L because duty cycles are usually less than 50%.
Nevertheless, both inequalities should be evaluated, and L
should be selected based on the lower of the two results. In each
equation, L is the per-channel inductance, C is the total output
capacitance, and N is the number of active channels.
2 ⋅ N ⋅ C ⋅ V_O
L ≤ ------------------------------ ⋅
(ΔI)²
ΔV_MAX – (ΔI ⋅ ESR)
(EQ. 41)
L ≤ ¹----^.-²----⁵-----^â‹---^N-----^â‹---^C-- ⋅
(ΔI)²
ΔV_MAX – (ΔI ⋅ ESR)
⋅
⎛
⎝
V_IN
–
V_{O⎠⎞}
(EQ. 42)
Switching Frequency
There are a number of variables to consider when choosing the
switching frequency, as there are considerable effects on the
upper MOSFET loss calculation. These effects are outlined in
“MOSFETs” on page 23, and they establish the upper limit for the
switching frequency. The lower limit is established by the
requirement for fast transient response and small output-voltage
ripple as outlined in “Output Filter Design” on page 27. Choose
the lowest switching frequency that allows the regulator to meet
the transient-response requirements.
Switching frequency is determined by the selection of the
frequency-setting resistor, R_T. Figure 22 and Equation 43 are provided
to assist in selecting the correct value for R_T.
R_T
=
[10.61
10
–
( 1.035
⋅
log
(fS))
]
(EQ. 43)
1k
100
10
10k
100k
1M
10M
SWITCHING FREQUENCY (Hz)
FIGURE 22. R_T vs SWITCHING FREQUENCY
Input Capacitor Selection
The input capacitors are responsible for sourcing the AC
component of the input current flowing into the upper MOSFETs.
Their RMS current capacity must be sufficient to handle the AC
component of the current drawn by the upper MOSFETs which is
related to duty cycle and the number of active phases.
28
FN7621.1
June 7, 2011