ISL6328 Datasheet, PDF (3/33 Pages) Intersil Corporation – Dual PWM Controller For Powering AMD SVI Split-Plane Processors

ISL6328
Controller Block Diagram
VSEN_NB
ISEN_NB+
ISEN_NB-
DRPCTRL
VDDPWRGD
OFS
COMP
CURRENT
SENSE
DROOP
CONTROL
OFFSET
RGND
NB_REF
∑
UV
LOGIC
OV
LOGIC
NB
FAULT
LOGIC
FB_NB
COMP_NB
E/A
RAMP
EN_12V
ENABLE
LOGIC
FB_PSI
FB
RGND
PWROK
SVC
SVD
VSEN
APA
OCP
CH3_OFF
PSI
+_∑
RGND +
SVI
SLAVE
BUS
E/A
NB_REF
OV
LOGIC
APA
UV
LOGIC
OC
DUAL
OCP
I_TRIP
8
N
SOFT-START
AND
FAULT LOGIC
LOAD APPLY
TRANSIENT
ENHANCEMENT
CLOCK AND
TRIANGLE WAVE
GENERATOR
∑
∑
PWM1
PWM2
MOSFET
DRIVER
LDO
POWER-ON
RESET
MOSFET
DRIVER
MOSFET
DRIVER
TCOMP1
TCOMP2
ISEN1+
ISEN1-
ISEN2+
ISEN2-
ISEN3+
ISEN3-
ISEN4+
ISEN4-
TEMPERATURE
COMPENSATION
CH1
CURRENT
SENSE
CH2
CURRENT
SENSE
CH3
CURRENT
SENSE
CH4
CURRENT
SENSE
ISEN3-
ISEN4-
∑
I_TC_IN
∑
PWM3
PWM4
CHANNEL
CURRENT
BALANCE
I_AVG ₁
N
I_TC_IN
∑
1
8
GND
PH3/PH4
POR
CHANNEL
DETECT
EN_12V
ISEN2-
ISEN3-
ISEN4-
PWM3
SIGNAL
LOGIC
PWM4
SIGNAL
LOGIC
BOOT_NB
UGATE_NB
PHASE_NB
LGATE_NB
PVCC
EN
VCC
GVOT
BOOT1
UGATE1
PHASE1
LGATE1
FS
BOOT2
UGATE2
PHASE2
LGATE2
PWM3
PWM4
3
FN7621.1
June 7, 2011