ISL6328 Datasheet, PDF (10/33 Pages) Intersil Corporation – Dual PWM Controller For Powering AMD SVI Split-Plane Processors

ISL6328
Electrical Specifications Boldface limits apply over the operating temperature range. (Continued)
PARAMETER
TEST CONDITIONS
MIN
(Note 6)
TYP
PIN ADJUSTABLE OFFSET
OFS Source Current Accuracy (Positive Offset)
0.29
OFS Sink Current Accuracy (Negative Offset)
VCC-1.7
REFERENCE AND DAC
System Accuracy (VDAC > 1.000V)
-0.6
System Accuracy (0.600V < VDAC < 1.000V)
-1.0
System Accuracy (VDAC < 0.600V)
-2.0
GATE VOLTAGE OPTIMIZATION
GVOT Voltage
PVCC = 12V, I_GVOT = 50mA
5.75
ERROR AMPLIFIER
DC Gain
Gain-Bandwidth Product (Note 7)
Slew Rate (Note 7)
Maximum Output Voltage
R_L = 10k to ground, (Note 7)
C_L = 100pF, R_L = 10k to ground, (Note 7)
C_L = 100pF, Load = ±400µA, (Note 7)
Load = 500µA
96
20
8
3.8
4.2
Minimum Output Voltage
Load = -500µA
1.4
FB_PSI Impedance
Impedance Between FB and FB_PSI
60
SOFT-START RAMP
Soft-Start Slew Rate (SR_SS) and VID-On-The-Fly Slew
Rate (SR_VOF)
PWM OUTPUTS
2.5
3
PWM Output Voltage LOW
PWM Output Voltage HIGH
PWM Tri-State Output Voltage
DROOP CURRENT
Core Tolerance
North Bridge Tolerance
CORE OVERCURRENT PROTECTION
I_LOAD = ±500µA
I_LOAD = ±500µA
I_LOAD = 100µA
4.0
1.5
2
4 Phases Active, R_ISENn = 100Ω, ISENn = 80μA
67
75
R_{ISEN_NB} = 100Ω, I_{ISEN_NB} = 100μA
67
75
Instant Overcurrent Trip Level - I_DROOP
Instant Overcurrent Trip Level - I_{SEN_AVG}
Delayed Overcurrent Trip Level - I_{SEN_AVG}
Overcurrent Trip Level - Individual Channel
(Note 7)
(Note 7)
115
141
131
150
100
170
OCP Pin Current
OCP Pin Voltage Trip
Delayed OCP Level Tripped
Delayed OCP Level Tripped
1.95
20
2.05
NORTH BRIDGE OVERCURRENT PROTECTION
Overcurrent Trip Level - I_{SEN_NB}
82
Overcurrent Trip Level - I_{DROOP_NB}
ISL6328CRZ
80
Overcurrent Trip Level - I_{DROOP_NB}
ISL6328IRZ
76
MAX
(Note 6) UNITS
0.32
V
VCC-1.56 V
+0.6
%
+1.0
%
+2.0
%
V
1.65
dB
MHz
V/µs
V
V
Ω
3.8 mV/µs
0.35
V
V
2.7
V
85
µA
83
µA
166
µA
178
µA
µA
µA
µA
2.15
V
141
µA
128
µA
128
µA
10
FN7621.1
June 7, 2011