ISL6328 Datasheet, PDF (15/33 Pages) Intersil Corporation – Dual PWM Controller For Powering AMD SVI Split-Plane Processors

ISL6328
A capacitor, C_ISEN, should be placed between the ISENn+ pin and
ground. The value of the capacitor can be calculated using
Equation 11.
C_ISEN
=
-⁹---^.--⁵----ⁿ---^s--
R_ISEN
(EQ. 11)
I_{TC_IN}
I_{ITC_OUT}
R₁
R_NTC
TCOMP1
TCOMP2
R₂
R_T(T)
R_TC = R_T(25°C)
R₃
FIGURE 5. AVERAGE CURRENT TEMPERATURE
COMPENSATION
Temperature Compensated Current Sensing
As the load increases, the conduction losses in the output
inductors will cause the temperature of the inductors to rise. As
the inductor temperature rises, the DCR of the output inductors
will also rise. An increase in the DCR will result in an increase in
the sensed current even if the load current remains constant. To
counteract this error in the sensed current, the ISL6328 features
a temperature compensating circuit that utilizes an NTC resistor
to adjust the average current as inductor temperature increases.
Figure 5 shows the implementation of the ISL6328 average
current temperature compensation. The temperature dependent
resistor, R_T(T), is a combination of resistors and an NTC which
create an approximate linearization of the NTC resistor (refer to
Equation 12). Resistors R₁, R₂ and R₃ should be adjusted so that
Equation 13 is satisfied.
R_T(T)
=
R₃
+
-------------------¹---------------------
------------¹--------------
R₁ + R_NTC
+
--¹----
R₂
(EQ. 12)
R_T(T) = -^D----^C---_D-^R---_C-⁽---^+R----²₍---_T5---₎-^°--^C-----⁾ ⋅ R_TC
Where R_TC = R_T (+25°C)
(EQ. 13)
LOAD MONITORING
The TCOMP2 pin can be utilized to monitor the load current. The
voltage across the R_TC resistor is a temperature compensated
representation of the load current. The load current is given by
Equation 14.
I_LOAD
=
8
⋅
-^V---^T---^C---^O----^M-----^P---²--
R_TC
⋅
-^R----^I-^S----^E---^N--
DCR
(EQ. 14)
Where R_ISEN is the current sense resistor value and DCR is the
DC resistance of the output inductors. It is recommended that a
high impedance buffer be used when monitoring the voltage on
the TCOMP2 pin.
Channel-Current Balance
One important benefit of multi-phase operation is the thermal
advantage gained by distributing the dissipated heat over
multiple devices and greater area. By doing this the designer
avoids the complexity of driving parallel MOSFETs and the
expense of using expensive heat sinks and exotic magnetic
materials.
In order to realize the thermal advantage, it is important that
each channel in a multi-phase converter be controlled to carry
about the same amount of current at any load level. To achieve
this, the currents through each channel must be sampled every
switching cycle. The sampled currents, I_n, from each active
channel are summed together and divided by the number of
active channels. The resulting cycle average current, I_AVG,
provides a measure of the total load-current demand on the
converter during each switching cycle. Channel-current balance is
achieved by comparing the sampled current of each channel to
the cycle average current, and making the proper adjustment to
each channel pulse width based on the error. Intersil’s patented
current-balance method is illustrated in Figure 6, with error
correction for Channel 1 represented. In the figure, the cycle
average current, I_AVG, is compared with the Channel 1 sample,
I₁, to create an error signal I_ER.
V_COMP
+
-
FILTER f(s)
MODULATOR
RAMP
WAVEFORM
PWM1
+
-
TO GATE
CONTROL
LOGIC
I_ER
I₄
I_AVG
1.3
Σ
-
N
I₃
+
I₂
I₁
NOTE: CHANNELS 2, 3 AND 4 ARE OPTIONAL.
FIGURE 6. CHANNEL-1 PWM FUNCTION AND CURRENT-
BALANCE ADJUSTMENT
The filtered error signal modifies the pulse width commanded by
V_COMP to correct any unbalance and force I_ER toward zero. The
same method for error signal correction is applied to each active
channel.
Serial VID Interface (SVI)
The on-board Serial VID interface (SVI) circuitry allows the
processor to directly drive the core voltage and Northbridge
voltage reference level within the ISL6328. The SVC and SVD
15
FN7621.1
June 7, 2011