ISL6323B Datasheet, PDF (31/35 Pages) Intersil Corporation – Monolithic Dual PWM Hybrid Controller Powering AMD SVI Split-Plane and PVI Uniplane Processors

ISL6323B
transient, the capacitor voltage becomes slightly depleted.
The output inductors must be capable of assuming the entire
load current before the output voltage decreases more than
ΔV_MAX. This places an upper limit on inductance.
Equation 56 gives the upper limit on L for the cases when
the trailing edge of the current transient causes a greater
output-voltage deviation than the leading edge. Equation 57
addresses the leading edge. Normally, the trailing edge
dictates the selection of L because duty cycles are usually
less than 50%. Nevertheless, both inequalities should be
evaluated, and L should be selected based on the lower of
the two results. In each equation, L is the per-channel
inductance, C is the total output capacitance, and N is the
number of active channels.
2 ⋅ N ⋅ C ⋅ V_O
L
≤
---------------------------------
(ΔI)²
⋅
ΔV_MAX – (ΔI ⋅ ESR)
(EQ. 56)
L
≤
1----.--2---5-----⋅_---N------⋅_---C--
(ΔI)²
⋅
ΔV_MAX – (ΔI ⋅ ESR)
⋅ _⎝⎛V_IN – V_{O⎠⎞}
(EQ. 57)
Switching Frequency
There are a number of variables to consider when choosing
the switching frequency, as there are considerable effects on
the upper MOSFET loss calculation. These effects are
outlined in “MOSFETs” on page 24, and they establish the
upper limit for the switching frequency. The lower limit is
established by the requirement for fast transient response
and small output-voltage ripple as outlined in “Output Filter
Design” on page 30. Choose the lowest switching frequency
that allows the regulator to meet the transient-response
requirements.
Switching frequency is determined by the selection of the
frequency-setting resistor, R_T. Figure 24 and Equation 58
are provided to assist in selecting the correct value for R_T.
RT
=
[10.61
10
–
(1.035
⋅
log
(fS))]
(EQ. 58)
1k
Input Capacitor Selection
The input capacitors are responsible for sourcing the AC
component of the input current flowing into the upper
MOSFETs. Their RMS current capacity must be sufficient to
handle the AC component of the current drawn by the upper
MOSFETs which is related to duty cycle and the number of
active phases.
0.3 _{IL(P-P) = 0}
I_L(P-P) = 0.25 I_O
I_L(P-P) = 0.5 I_O
I_L(P-P) = 0.75 I_O
0.2
0.1
0
0
0.2
0.4
0.6
0.8
1.0
DUTY CYCLE (V_O/V_IN)
FIGURE 25. NORMALIZED INPUT-CAPACITOR RMS CURRENT
vs DUTY CYCLE FOR 4-PHASE CONVERTER
For a four-phase design, use Figure 25 to determine the
input-capacitor RMS current requirement set by the duty
cycle, maximum sustained output current (I_O), and the ratio
of the peak-to-peak inductor current (I_L(P-P)) to I_O. Select a
bulk capacitor with a ripple current rating which will minimize
the total number of input capacitors required to support the
RMS current calculated.
The voltage rating of the capacitors should also be at least
1.25x greater than the maximum input voltage. Figures 26 and
27 provide the same input RMS current information for 3-phase
and two-phase designs respectively. Use the same approach
for selecting the bulk capacitor type and number.
0.3
I_L(P-P) = 0
I_L(P-P) = 0.5 I_O
I_L(P-P) = 0.25 I_O
I_L(P-P) = 0.75 I_O
0.2
100
0.1
10
10k
100k
1M
10M
SWITCHING FREQUENCY (Hz)
FIGURE 24. R_T vs SWITCHING FREQUENCY
31
0
0
0.2
0.4
0.6
0.8
1.0
DUTY CYCLE (V_IN/V_O)
FIGURE 26. NORMALIZED INPUT-CAPACITOR RMS
CURRENT FOR 3-PHASE CONVERTER
FN6879.0
March 23, 2009