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CD1865 Datasheet, PDF (98/150 Pages) Intel Corporation – Intelligent Eight-Channel Communications Controller
CD1865 — Intelligent Eight-Channel Communications Controller
9.2.1
9.2.1.1
Miscellaneous Registers
Global Firmware Revision Code Register
Register Name: GFRCR
Register Description: Global Firmware Revision Code Register
Default Value: 84
Access: Read/Write
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Firmware Revision Code
Bit 2
8-Bit Hex Address: $6B
Intel Hex Address: $D6
Motorola Hex Address: $D7
Bit 1
Bit 0
9.2.2
9.2.2.1
This register is initialized by the firmware during the power-on reset initialization routine to
contain the current firmware version code of the CD1865.
This register is a RAM location and may be modified by the user. The CD1865 sets it to the defined
value only when a hardware or software reset is performed, and its contents are otherwise ignored.
This value can be modified to indicate the configuration status of the CD1865, or to indicate any
other requirement.
Configuration Registers
Service Request Configuration Register
Register Name: SRCR
Register Description: Service Request Configuration Register
Default Value: 0
Access: Read/Write
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
PkgTyp
RegAckEn
DaisyEn
GlobPri
UnFair
Bit 2
Reserved
8-Bit Hex Address: $66
Intel Hex Address: $CC
Motorola Hex Address: $CD
Bit 1
Bit 0
AutoPri
PriSel
This register configures the CD1865 depending on the method chosen for handling service
requests. In addition to the ‘traditional’ interrupt-based host interface, writing the appropriate bits
in this register provides for software- rather than hardware-based service request
acknowledgments, fixes service request priorities in either of two ways, and controls Fair Share
Interrupt operation. This register preserves compatibility with existing CD1865 software. For this
reason, this register defaults to all zeroes and must be enabled for each new feature as required.
RegAckEn and DaisyEn Bits are related to each other, and perform service-request
acknowledgments by accessing registers within the CD1865 instead of asserting hardware signals.
Service requests are prioritized by four other bits. AutoPri enables the priority scheme; PriSel,
GlobPri, and UnFair determine the specific priority to be used.
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Datasheet