CD1865 Datasheet, PDF (68/150 Pages) Intel Corporation – Intelligent Eight-Channel Communications Controller

CD1865 — Intelligent Eight-Channel Communications Controller
7.1.10
7.2
7.2.1
Programming Notes
If a special condition (for example, framing or a parity error) occurred on a special character, the
CD1865 does not interpret this character as matched. Flow-control characters that are processed
and discarded because FCT is set never cause an overrun.
Special Character Recognition only occurs on characters that have no other problems or errors.
There is one case where the CD1865 does not find a special character even though the character
has been correctly received. If a good character arrives as the ninth character (for example, the
FIFO is full), it stays in a Holding register. If another character arrives, the good character in the
Holding register has its status marked as ‘overflow’, indicating that it is the last good character
received; however, it is not recognized as a special character.
There are two cases where the CD1865 might not detect a two-character sequence. If the first
character has been found, but no other character has been received for a long period of time and the
Receive Time-out event occurs, no match is found because the first character is flushed up to the
host. If special-character detection is disabled by clearing SCDE just when the CD1865 has
received the first two-character special-character sequence, but has not received the second
character yet, the first character is lost.
Transmitter Operation
Basic Operation
Refer to Figure 24 on page 69 for a diagram of transmitter operation. Upon power-on reset, all
transmitters are disabled with their Transmit Output held in the ‘Mark’ or a logic ‘1’ condition.
Other channel parameters are undefined. The minimum configuration of a channel for transmission
consists of specifying the bit rate, parity, and number of Stop bits. In-band and Out-of-Band Flow
Control should also be set as required. Next, set either (or both) of the service request enable bits.
Then issue the Transmit Enable Command and either of two service request enable bits. For normal
operation, set the TxRDY bit. This causes a service request to be issued when the FIFO is empty.
Since on power-up the FIFO is empty, a service request is received (less than 1 ms.), and at that
time data can be transferred to the FIFO. Data can not be transferred to the FIFO as part of channel
initialization; instead one has to be in the service-request routine to do this. Refer to the Section 5.3
for details.
Once the channel is initialized and serviced, and a character is written into the Transmit FIFO, the
transmitter starts to transmit by first sending the Start bit (space or a logic ‘0’) followed by the data
character according to predefined character length, least significant bit first. An optional parity bit
(none, odd, even, or forced) is appended followed by the final Stop bit (a logic ‘1’ or a ‘Mark’).
The length of the Stop bit can be one, one-and-a-half, two, or two-and-a-half bit-times long.
The transmitter continues sending characters one after the other until the Transmit FIFO is empty.
When the Transmit FIFO is empty and the last character is sent, the transmitter stops transmission
and holds the TxD Output in the ‘Mark’ (1) condition. Transmission resumes another character is
in the FIFO.
In some cases it must be determined if the channel is completely done transmitting the last bit of
the last character — for instance, before changing the bit rate. In such a case, the service request is
to be issued only when the last character is sent, rather than when the FIFO is empty. In this case,
instead of setting the TxRDY bit, set the TxMpty bit. This causes a service request to be issued
only when the transmitter is completely empty.
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Datasheet