CD1865 Datasheet, PDF (122/150 Pages) Intel Corporation – Intelligent Eight-Channel Communications Controller

CD1865 — Intelligent Eight-Channel Communications Controller
9.4.12
Special Character 1 defines the Xon character or the first-half of the Xon-character sequence. The
second half is Special Character register 3.
Special Character Register 2
Register Name: SCHR2
Register Description: Special Character Register 2
Default Value: 0
Access: Read/Write
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Special Character 2
Bit 2
8-Bit Hex Address: $0A
Intel Hex Address: $14
Motorola Hex Address: $15
Bit 1
Bit 0
9.4.13
This register stores the right-justified bit pattern for Special Character 2. Unused bits must be a ‘0’.
During receive, this character is one of the four characters compared with the received data for
special-character recognition. If a match occurs with one of these four characters, it is noted in the
Receiver Status FIFO entry accompanying the received character unless a double-character
compare is enabled. In this case, the Receive Status FIFO entry is not made until both characters
are compared.
During transmit, this register contains the characters that are sent as a result of the Send Special
Character 2 command. If two-character sequences are enabled, Characters 2 and 4 are sent.
Special Character 2 defines the Xoff character or the first-half of the Xoff-character sequence.
Special Character Register 3
Register Name: SCHR3
Register Description: Special Character Register 3
Default Value: 0
Access: Read/Write
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Special Character 3
Bit 2
8-Bit Hex Address: $0B
Intel Hex Address: $16
Motorola Hex Address: $17
Bit 1
Bit 0
This register stores the right-justified bit pattern for Special Character 3. Unused bits must be a ‘0’.
During receive, this character is one of the four characters compared with the received data for
special character recognition. If a match occurs with one of these four characters, it is noted in the
Receiver Status FIFO entry accompanying the received character unless a double-character
compare is enabled. In this case, the Receive Status FIFO entry is not made until both characters
are compared.
During transmit, this register contains the characters that are sent as a result of the Send Special
Character 3 command.
Special Character 3 may be the second-half of the Xon-character sequence.
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Datasheet