CD1865 Datasheet, PDF (117/150 Pages) Intel Corporation – Intelligent Eight-Channel Communications Controller

Intelligent Eight-Channel Communications Controller — CD1865
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
9.4.5
Description
Implied Xon Mode (IXM): This bit has meaning only when in the automatic Transmit In-Band Flow-control
mode. During Transmit In-Band Flow-control mode, the CD1865 stops transmission upon detection of an Xoff
character or character sequence. The IXM bit determines whether the CD1865 should restart transmission
based on receipt of an Xon character or any character. When IXM bit is set, the CD1865 restarts transmission
upon detection of any character. When IXM bit is not set, the CD1865 waits for the Xon character or character
sequence to restart the transmission.
Transmit In-Band (Xon/Xoff) Flow Control Automatic Enable (TxIBE): The CD1865 in the Transmitting
mode is flow-controlled by the remote. Upon receipt of the Xoff character, the CD1865 terminates
transmission after the current character in the Transmit Shift register, and the character in the Transmit
Holding register is sent. The CD1865 resumes transmission upon receipt of the Xon character, or any
character, depending on the state of the IXM bit.
Embedded Transmitter Command Enable (ETC): If set, the embedded special transmitter command
functions are enabled.
Local Loopback Mode (LLM):
1 = Enables the Local Loopback mode.
0 = Disables the Local Loopback mode.
Remote Loopback Mode (RLM):
1 = Enables the Remote Loopback mode.
0 = Disables the Remote Loopback mode.
RTS Automatic Output Enable (RtsAO): When set, if the channel is enabled, the CD1865 automatically
asserts the RTS* Output when it has characters to send. If CtsAE is also set, it waits for CTS* to respond prior
to transmission.
CTS Automatic Enable (CtsAE): Enables the CTS* Input to be used as automatic transmitter enable or
disable.
DSR Automatic Enable (DsrAE): Enables the DSR* Input as automatic receiver enable or disable.
Channel Option Register 3
Register Name: COR3
Register Description: Channel Option Register 3
Default Value: 0
Access: Read/Write
Bit 7
Bit 6
Bit 5
Bit 4
Xon CH
Xoff CH
FCT
SCDE
Bit 3
RxTH3
Bit 2
RxTH2
8-Bit Hex Address: $05
Intel Hex Address: $0A
Motorola Hex Address: $0B
Bit 1
Bit 0
RxTH1
RxTH0
Changes to this register do not have to be signalled by the CCR.
Datasheet
117