CD1865 Datasheet, PDF (91/150 Pages) Intel Corporation – Intelligent Eight-Channel Communications Controller

Intelligent Eight-Channel Communications Controller — CD1865
if (int_status & 0x02)
Service_Mdm();
} //while
outportb(S8259, EOI);
outportb(S8259, RDISTAT);
if ( !inportb(S8259) )
outportb(M8259, EOI);
/* End of Interrupt */
/* Next access read the IS Reg. */
/* while the slave is not serving any int. */
/* issue End of Int. (EOI) to master */
Once the interrupt source has been determined, the request must be serviced by issuing an IACKIN
signal to the device with the preprogrammed PILR match value supplied as the address. A receive
interrupt acknowledge cycle might be written as shown. Immediately following the write to the
EOIR register to terminate the current interrupt context, the 8259A must be informed that the
service is over. This is done by the simple procedure shown at the end of the interrupt source
determination routine above.
Receive Interrupt Service
Service_Rx(unsigned char chan)
{
unsigned charchannel, vector, RxCount;
int
i;
vector= Read_Byte(0x8a);
// perform hardware acknowledge
channel = Read_Byte(GSCR1) >>
2;
RxCount=Read_Byte(RDCR);
transfered.
// RDCR contains the number of byte to be
if ((RxCount>0)&&(RxCount<=8))
{
if ((exception_data = Read_Byte(RCSR)) != 0)
// Receive Exception: in this
receive
// Example, we disable receive
// Operation if detected a
// Exception.
{
Set_Byte(CAR, chan);
Set_Byte(SRER, 0x00);
// Disable receive
}
else
no
// Normal Receive Operation:
// Receive exception.
{
if (channel==chan){
// Correct Receiving Channel
for (i=RxCount; i>0; i--){
rx_str[rx_ptr]=Read_Byte(RDR);
rx_ptr++;
}//for
}//if
else
// Incorrect Receiving Channel
Rx_chan_err = 1;
} // else
} //if
Set_Byte(EOSRR, 0x00);
Transmit End of
written to by the
routine to
// Set Transmit End of Int Reg. The
// Interrupt Register must be
// Corresponding host interrupt service
Datasheet
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