EP82562ET Datasheet, PDF (9/40 Pages) Intel Corporation – 10/100 Mbps Platform LAN Connect (PLC)

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Networking Silicon — 82562ET
82562ET Signal Descriptions
Signal Type Definitions
Type
I
O
I/O
MLT
B
DPS
APS
Name
Description
Input
Input pin to the 82562ET.
Output
Output pin from the 82562ET.
Input/Output Multiplexed input and output pin to and from the 82562ET.
Multi-level
analog I/O
Multi-level analog pin used for input and output.
Bias
Bias pin used for ground connection through a resistor or an external voltage
reference.
Digital Power
Supply
Digital power or ground pin for the 82562ET.
Analog Power
Supply
Analog power or ground pin for the 82562ET.
Twisted Pair Ethernet (TPE) Pins
Pin Name
TDP
TDN
RDP
RDN
Pin
Number
Type
10
MLT
11
15
MLT
16
Description
Transmit Differential Pair. The transmit differential pair sends serial bit
streams to the unshielded twisted pair (UTP) cable. The differential pair is
a two-level signal in 10BASE-T (Manchester) mode and a three-level
signal in 100BASE-TX mode (MLT-3). These signals directly interface with
the isolation transformer.
Receive Differential Pair. The receive differential pair receive the serial
bit stream from an unshielded twisted pair (UTP) cable. The differential
pair is a two-level signal in 10BASE-T mode (Manchester) or a three-level
signal in 100BASE-TX mode (MLT-3). These signals directly interface with
an isolation transformer.
External Bias Pins
Pin Name
Pin
Number
Type
Description
RBIAS10
4
RBIAS100 5
B
Bias Reference Resistor 10. This pin should be connected to a 549 Ω
pull-down resistor.^a
B
Bias reference Resistor 100. This pin should be connected to a 619 Ω
pull-down resistor.^b
a. 549 Ω for RBIAS10 is only a recommended value and should be fine tuned for various designs.
b. 619 Ω for RBIAS100 is only a recommended value and should be fine tuned for various designs.
Datasheet
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