EP82562ET Datasheet, PDF (13/40 Pages) Intel Corporation – 10/100 Mbps Platform LAN Connect (PLC)

Networking Silicon — 82562ET
4.0
Physical Layer Interface Functionality
The 82562ET is designed to work in Data Terminating Equipment (DTE) mode only. It supports a
direct glueless interface to all components that comply with the LAN Connect specification. The
following figure shows how the 82562ET PLC can be used in a 10/100 Mbps Ethernet switch
design.
Figure 3. 82562ET 10/100 Mbps Ethernet Solution
I/O Control Hub 2
(ICH2) LAN
Controller
82562ET
(LAN Connect
Device)
Transmit Differential Pair
(TDP/TDN)
Receive Differential Pair
(RDP/RDN)
System Bus Interface
Magnetics
4.1
100BASE-TX Mode
4.1.1
100BASE-TX Transmit Blocks
The transmit subsection of the 82562ET accepts 3 bit wide data from the LAN Connect unit.
Another subsection passes data unconditionally to the 4B/5B encoder.
The 4B/5B encoder accepts nibble-wide data (4 bits) from the CSMA unit and compiles it into 5-
bit-wide parallel symbols. These symbols are scrambled and serialized into a 125 Mbps bit stream,
converted by the analog transmit driver into a MLT-3 waveform format, and transmitted onto the
Unshielded Twisted Pair (UTP) or Shielded Twisted Pair (STP) wire.
4.1.1.1
100BASE-TX 4B/5B Encoder
The 4B/5B encoder complies with the IEEE 802.3u 100BASE-TX standard. Four bits are encoded
according to the transmit 4B/5B lookup table. The lookup table matches a 5-bit code to each 4-bit
code. The table below illustrates the 4B/5B encoding scheme associated with the given symbol.
Table 2. 4B/5B Encoder
Symbol
0
1
2
3
4
5
5B Symbol Code
11110
01001
10100
10101
01010
01011
4B Nibble Code
0000
0001
0010
0011
0100
0101
Datasheet
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