EP82562ET Datasheet, PDF (26/40 Pages) Intel Corporation – 10/100 Mbps Platform LAN Connect (PLC)

82562ET — Networking Silicon
5.3.2
Bit(s)
Name
6:2
PHY Address
1
Speed
0
Duplex Mode
Description
These bits contain the sampled PHY address.
This bit indicates the Auto-Negotiation result.
0 = 10 Mbps
1 = 100 Mbps
This bit indicates the Auto-Negotiation result.
0 = Half-duplex
1 = Full-duplex
Default
--
--
R/W
RO
RO
--
RO
Register 17: PHY Unit Special Control Bit Definitions
Bit(s)
Name
Description
15
Scrambler By-
0 = Normal operations
pass
1 = By-pass scrambler
14
By-pass 4B/5B 0 = Normal operation
1 = 4 bit to 5 bit by-pass
13
Force Transmit H- 0 = Normal operation
Pattern
1 = Force transmit H-pattern
12
Force 34 Transmit 0 = Normal operation
Pattern
1 = Force 34 transmit pattern
11
Valid Link
0 = Normal operation
1 = 100BASE-TX valid link
10
Symbol Error
0 = Normal operation
Enable
1 = Symbol error output is enabled
9
Carrier Sense
This bit controls the receive 100 carrier sense disable
Disable
function.
0 = Carrier sense enabled
1 = Carrier sense disabled
8
Disable Dynamic 0 = Dynamic Power-Down enabled
Power-Down
1 = Dynamic Power-Down disabled
7
Auto-Negotiation 0 = Auto-Negotiation normal mode
Loopback
1 = Auto-Negotiation loopback
6
MDI Tri-State
0 = Normal operation
1 = MDI Tri-state (transmit driver tri-states)
5
Force Polarity
0 = Normal polarity
1 = Reversed polarity
4
Auto Polarity
0 = Normal polarity operation
Disable
1 = Auto Polarity disabled
3
Squelch Disable 0 = Normal squelch operation
1 = 10BASE-T squelch test disable
Default
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
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Datasheet