EP82562ET Datasheet, PDF (15/40 Pages) Intel Corporation – 10/100 Mbps Platform LAN Connect (PLC)

Networking Silicon — 82562ET
negative and zero. When an NRZ “0” arrives at the input of the encoder, the last output level is
maintained (either positive, negative or zero). When an NRZ “1” arrives at the input of the encoder,
the output steps to the next level. The order of steps is negative-zero-positive-zero which continues
periodically. Refer to IEEE 802.3 Specification for details.
4.1.1.3
100BASE-TX Transmit Framing
The 82562ET does not differentiate between the fields of the MAC frame containing preamble,
start of frame delimiter, data and Cyclic Redundancy Check (CRC). The 82562 encodes the first
byte of the preamble as the “JK” symbol, encodes all other pieces of data according to the 4B/5B
lookup table, and adds the “TR” code after the end of the packet. The 82562 scrambles and
serializes the data into a 125 Mbps stream, encodes it as MLT-3, and drives it onto the wire.
4.1.1.4
Transmit Driver
The transmit differential lines are implemented with a digital slope controlled current driver that
meets Twisted Pair Physical Media Device (TP-PMD) specifications. Current is sunk from the
isolation transformer by the transmit differential pins. The conceptual transmit differential
waveform for 100 Mbps is illustrated in the following figure.
Figure 4. Conceptual Transmit Differential Waveform
4.1.2
4.1.2.1
The magnetics module external to the 82562ET converts I_TDP and I_TDN to 2.0 V_PP, as required by
the TP-PMD specification. The same magnetics used for 100BASE-TX mode can also work in
10BASE-T mode.
100BASE-TX Receive Blocks
The receive subsection of the 82562ET accepts 100BASE-TX MLT-3 data on the receive
differential pair. Due to the advanced digital signal processing design techniques employed, the
82562ET will accurately receive valid data from Category 5 (CAT5) UTP and Type 1 STP cable of
length well in excess of 100 meters.
Adaptive Equalizer
The distorted MLT-3 signal at the end of the wire is restored by the equalizer. The equalizer
performs adaptation based on the shape of the received signal, equalizing the signal to meet
superior data dependent jitter performance.
Datasheet
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