EP82562ET Datasheet, PDF (4/40 Pages) Intel Corporation – 10/100 Mbps Platform LAN Connect (PLC)

82562ET — Networking Silicon
5.3 Medium Dependent Interface Registers 16 through 31 ...................................... 21
5.3.1 Register 16: PHY Status and Control Register Bit Definitions .............. 21
5.3.2 Register 17: PHY Unit Special Control Bit Definitions ........................... 22
5.3.3 Register 18: PHY Address Register ....................................................... 23
5.3.4 Register 19: 100BASE-TX Receive False Carrier Counter Bit Definitions
23
5.3.5 Register 20: 100BASE-TX Receive Disconnect Counter Bit Definitions ...
23
5.3.6 Register 21: 100BASE-TX Receive Error Frame Counter Bit Definitions .
23
5.3.7 Register 22: Receive Symbol Error Counter Bit Definitions .................. 24
5.3.8 Register 23: 100BASE-TX Receive Premature End of Frame Error
Counter Bit Definitions 24
5.3.9 Register 24: 10BASE-T Receive End of Frame Error Counter Bit Defini-
tions 24
5.3.10 Register 25: 10BASE-T Transmit Jabber Detect Counter Bit Definitions ..
24
5.3.11 Register 27: PHY Unit Special Control Bit Definitions ........................... 24
6.0
Electrical and Timing Specifications................................................................................. 27
6.1 Absolute Maximum Ratings ................................................................................ 27
6.2 DC Characteristics ............................................................................................. 27
6.2.1 X1 Clock DC Specifications ................................................................... 27
6.2.2 LAN Connect Interface DC Specifications ............................................. 28
6.2.3 LED DC Specifications .......................................................................... 28
6.2.4 10BASE-T Voltage and Current DC Specifications ............................... 28
6.2.5 100BASE-TX Voltage and Current DC Specifications .......................... 29
6.3 AC Characteristics .............................................................................................. 30
6.3.1 10BASE-T Normal Link Pulse (NLP) Timing Parameters ..................... 30
6.3.2 Auto-Negotiation Fast Link Pulse (FLP) Timing Parameters ................. 31
6.3.3 100BASE-TX Transmitter AC Specifications ......................................... 32
6.3.4 Reset (RSTSYNC) AC Specifications ................................................... 32
7.0
Package and Pinout Information ...................................................................................... 33
7.1 Package Information ........................................................................................... 33
7.2 Pinout Information ............................................................................................... 34
7.2.1 82562ET Pin Assignments .................................................................... 34
7.2.2 82562ET Shrink Small Outlying Package Diagram ............................... 35
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Datasheet