82596CA Datasheet, PDF (67/76 Pages) Intel Corporation – HIGH-PERFORMANCE 32-BIT LOCAL AREA NETWORK COPROCESSOR

82596CA
SYSTEM INTERFACE A C TIMING CHARACTERISTICS
The measurements should be done at
 T_C ^e 0 C to ^a85 C V_CC ^e 5V g10% C ^e 50 pF unless otherwise specified
 A C testing inputs are driven at 2 4V for a logic ‘‘1’’ and 0 45V for a logic ‘‘0’’
 Timing measurements are made at 1 5V for both logic ‘‘1’’ and ‘‘0’’
 Rise and Fall time of inputs and outputs signals are measured between 0 8V and 2 0V respectively unless
otherwise specified
 All timings are relative to CLK crossing the 1 5V level
 All A C parameters are valid only after 100 ms from power up
290218 – 18
Figure 46 CLK Timings
Two types of timing specifications are presented below
1 Input Timing minimum setup and hold times
2 Output Timings output delays and float times from CLK rising edge
Figure 47 defines how the measurements should be done
290218 – 19
LEGEND
Ts e Input Setup Time
Th e Input Hold Time
Tn e Minimum output delay or Mininum float delay
Tx e Maximum output delay or Maximum float delay
290218 – 20
Figure 47 Drive Levels and Measurements Points for A C Specifications
Ts ^e T13 T15 T17 T19 T21 T23 T27 T29 T31
Th ^e T14 T16 T18 T20 T22 T22a T24 T28 T30 T32
Tn ^e T6 T6a T7 T8 T9 T10 T11 T12 T25
Tx ^e T6 T6a T7 T8 T9 T10 T11 T12 T25
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