82596CA Datasheet, PDF (54/76 Pages) Intel Corporation – HIGH-PERFORMANCE 32-BIT LOCAL AREA NETWORK COPROCESSOR

82596CA
where
EL
S
SF
C
B
OK (bit 13)
STATUS
LINK ADDRESS
RBD POINTER
EOF
F
SIZE
ACT COUNT
MC
DESTINATION
ADDRESS
SOURCE ADDRESS
LENGTH FIELD
When set this bit indicates that this RFD is the last one on the RDL
When set this bit suspends the RU after receiving the frame
This bit selects between the Simplified or the Flexible mode
0 Simplified mode all the RX data is in the RFD RBD ADDRESS field is all
‘‘1s ’’
1 Flexible mode Data is in the RFD and in a linked list of Receive Buffer De-
scriptors
This bit indicates the completion of frame reception It is set by the 82596
This bit indicates that the 82596 is currently receiving this frame or that the 82596
is ready to receive the frame It is initially set to 0 by the CPU The 82596 sets it to
1 when reception set up begins and to 0 upon completion The C and B bits are
set during the same operation
Frame received successfully without errors RFDs with bit 13 equal to 0 are possi-
ble only if the save bad frames configuration option is selected Otherwise all
frames with errors will be discarded although statistics will be collected on them
The results of the Receive operation Defined bits are
Bit 12 Length error if configured to check length
Bit 11 CRC error in an aligned frame
Bit 10 Alignment error (CRC error in misaligned frame)
Bit 9
Ran out of buffer space no resources
Bit 8
DMA Overrun failure to acquire the system bus
Bit 7
Frame too short
Bit 6
No EOP flag (for Bit stuffing only)
Bit 5
When the SF bit equals zero and the 82596 is configured to save bad
frames this bit signals that the receive frame was truncated Otherwise it
is zero
Bits 2–4 Zeros
Bit 1
When it is zero the destination address of the received frame matches
the IA address When it is a 1 the destination address of the received
frame did not match the individual address For example a multicast
address or broadcast address will set this bit to a 1
Bit 0
Receive collision A collision is detected during reception and the colli-
sion occurred after the destination address was received
A 16-bit offset (32-bit address in the Linear mode) to the next Receive Frame
Descriptor The Link Address of the last frame can be used to form a cyclical list
The offset (address in the Linear mode) of the first RBD containing the received
frame data An RBD pointer of all ones indicates no RBD
These fields are for the Simplified and Flexible memory models They are exactly
the same as the respective fields in the Receive Buffer Descriptor See the next
section for detailed explanation of their functions
Multicast bit
The contents of the destination address of the receive frame The field is 0 to 6
bytes long
The contents of the Source Address field of the received frame It is 0 to 6 bytes
long
The contents of this 2-byte field are user defined In 802 3 it contains the length of
the data field It is placed in memory in the same order it is received i e most
significant byte first least significant byte second
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