82596CA Datasheet, PDF (27/76 Pages) Intel Corporation – HIGH-PERFORMANCE 32-BIT LOCAL AREA NETWORK COPROCESSOR

82596CA
SYSTEM CONTROL BLOCK (SCB)
The SCB is a memory block that plays a major role in communications between the CPU and the 82596 Such
communications include the following
 Commands issued by the CPU
 Status reported by the 82596
Control commands are sent to the 82596 by writing them into the SCB and then asserting CA The 82596
examines the command performs the required action and then clears the SCB command word Control
commands perform the following types of tasks
 Operation of the Command Unit (CU) The SCB controls the CU by specifying the address of the Command
Block List (CBL) and by starting suspending resuming or aborting execution of CBL commands
 Operation of the Bus Throttle The SCB controls the Bus Throttle timers by providing them with new values
and sending the Load and Start timer commands The timers can be operated in both the 32-bit Segmented
and Linear modes
 Reception of frames by the Receive Unit (RU) The SCB controls the RU by specifying the address of the
Receive Frame Area and by starting suspending resuming or aborting frame reception
 Acknowledgment of events that cause interrupts
 Resetting the chip
The 82596 sends status reports to the CPU via the System Control Block The SCB contains four types of
status reports
 The cause of the current interrupts These interrupts are caused by one or more of the following 82596
events
 The Command Unit completes an Action Command that has its I bit set
 The Receive Unit receives a frame
 The Command Unit becomes inactive
 The Receive Unit becomes not ready
 The status of the Command Unit
 The status of the Receive Unit
 Status reports from the 82596 regarding reception of corrupted frames
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