82596CA Datasheet, PDF (62/76 Pages) Intel Corporation – HIGH-PERFORMANCE 32-BIT LOCAL AREA NETWORK COPROCESSOR

82596CA
AC Characteristics (Continued)
82596CA C-STEP INPUT OUTPUT SYSTEM TIMINGS
T_C ^e 0 C to ^a85 C V_CC ^e 5V g5% These timing assume the C_L on all outputs is 50 pF unless otherwise
specified C_L can be 20 pF to 120 pF however timings must be derated All timing requirements are given in
nanoseconds
Symbol
Parameter
33 MHz
Min
Max
Notes
Operating Frequency
12 5 MHz 33 MHz
1X CLK Input
T1
CLK Period
30
80
T1a
CLK Period Stability
0 1%
Adjacent CLK D
T2
CLK High
11
2 0V
T3
CLK Low
11
0 8V
T4
CLK Rise Time
3
0 8V to 2 0V
T5
CLK Fall Time
3
2 0V to 0 8V
T6
BEn Valid Delay
3
17
T6a
BLAST Valid Delay
3
20
T6b
LOCK Valid Delay
3
16
T6c
A2–A31 Valid Delay
3
18
T6d
PCHK Valid Delay
3
23
T7
BEn LOCK BLAST A2–A31 Float Delay
3
20
T8
W R and ADS Valid Delay
3
16
T9
W R and ADS Float Delay
3
20
T10
D0–D31 DPn Write Data Valid Delay
3
19
T11
D0–D31 DPn Write Data Float Delay
3
20
T12
HOLD Valid Delay
3
19
T13
CA and BREQ Setup Time
7
12
T14
CA and BREQ Hold Time
3
12
T15
BS16 Setup Time
7
2
T16
BS16 Hold Time
3
2
T17
BRDY Setup Time
9
2
T17a
RDY Setup Time
8
2
T18
BRDY RDY Hold Time
3
2
T19
D0–D31 DPn READ Setup Time
6
2
T20
D0–D31 DPn READ Hold Time
45
2
T21
AHOLD Setup Time
10
12
T21a
HLDA Setup Time
8
12
T22
AHOLD Hold Time
3
12
Timings shown are for the 82596CA C-Stepping For information regarding timings for the 82596CA A1 or B-Step contact
your local Intel representative
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