82596CA Datasheet, PDF (55/76 Pages) Intel Corporation – HIGH-PERFORMANCE 32-BIT LOCAL AREA NETWORK COPROCESSOR

82596CA
NOTES
1 The Destination address Source address and Length fields are packed i e one field immediately follows
the next
2 The affect of Address Length Location (No Source Address Insertion) configuration parameter while re-
ceiving is as follows
82586 Mode The Destination address Source address and Length field are not used they are placed in
the RX data buffers
32-Bit Segmented and Linear Modes when the Simplified memory model is used the Destination address
Source address and Length fields reside in their respective fields in the RFD When the Flexible memory
strucrture is used the Destination address Source address and Length field locations depend on the SIZE
field of the RFD They can be placed in the RFD in the RX data buffers or partially in the RFD and the rest
in the RX data buffers depending on the SIZE field value
82586 Mode
31
ODD WORD
16 15
EVEN WORD
A15
NEXT RBD OFFSET
A0 EOF F
ACTUAL COUNT
X X X X X X X X A23
RECEIVE BUFFER ADDRESS
X X X X X X X X X X X X X X X X EL X
SIZE
32-Bit Segmented Mode
31
ODD WORD
16 15
A15
NEXT RBD OFFSET
A0 EOF F
A31
RECEIVE BUFFER ADDRESS
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EL P
EVEN WORD
ACTUAL COUNT
SIZE
Linear Mode
31
ODD WORD
16 15
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EOF F
A31
NEXT RBD ADDRESS
A31
RECEIVE BUFFER ADDRESS
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EL P
EVEN WORD
ACTUAL COUNT
SIZE
Figure 43 Receive Buffer Descriptor
0
0
A0 4
8
0
0
A0 4
8
0
0
A0 4
A0 8
55