82595TX Datasheet, PDF (5/59 Pages) Intel Corporation – ISA/PCMCIA HIGH INTEGRATION ETHERNET CONTROLLER

82595TX
1 0 INTRODUCTION
1 1 82595TX Overview
The 82595TX is a highly integrated high perform-
ance LAN controller which provides a cost effective
LAN solution for ISA compatible Personal Computer
(PC) motherboards (both desktop and portable)
add-on ISA adapter boards and PCMCIA cards The
82595TX integrates all of the major functions of a
buffered LAN solution into one chip with the excep-
tion of the local buffer memory which is implement-
ed by adding one DRAM component to the LAN so-
lution The 82595TX’s new Concurrent Processing
feature significantly enhances throughput perform-
ance Both system bus and serial link activities occur
concurrently allowing the 82595TX to maximize net-
work bandwidth by minimizing delays associated
with transmit or receiving frames The 82595TX’s
bus interface is a glueless attachment to either an
ISA or PCMCIA version 2 0 bus Its serial interface
provides a Twisted Pair Ethernet (TPE) and an At-
tachment Unit Interface (AUI) connection By inte-
grating the majority of the LAN solution functions
into one cost effective component production cost
saving can be achieved as well as significantly de-
creasing the design time for a solution This level of
integration also allows an 82595TX solution to be
ported between different applications (PC mother-
boards adapters and PCMCIA IO cards) while
maintaining a compatible hardware and software
base This results in further savings in both hardware
and software development costs for manufacturers
expanding into different applications i e an ISA
adapter vendor producing PCMCIA IO cards etc
The 82595TX’s software interface is optimized to re-
duce the number of processing steps that are re-
quired to interface to the 82595TX solution The
82595TX’s initialization and control registers are di-
rectly addressable within one 16-byte IO address
block The 82595TX can automatically resolve any
conflicts to an IO block by moving its IO offset to an
unused location in the case that a conflict occurs
The 82595TX’s local memory is arranged in a simple
ring buffer structure for efficient transfer of transmit
and receive packets The local memory up to
64 Kbytes of DRAM resides as either a 16-bit or 32-
bit IO port in the host systems IO map programma-
ble through configuration The 82595TX provides di-
rect control over the local DRAM including refresh
The 82595TX performs a prefetch to the DRAM
memory allowing CPU IO cycles to this data with no
added wait-states The 82595TX also provides an
interface to up to 1 Mbyte of FLASH or EPROM
memory An interface to an EEPROM which holds
solution configuration values and can also contain
the Node ID allows for the implementation of a
‘‘jumperless’’ design In addition the 82595TX con-
tains full hardware support for the implementation of
the ISA Plug N’ Play specification Plug N’ Play elimi-
nates jumpers and complicated setup utilities by al-
lowing peripheral functions to be added to a PC au-
tomatically (such as adapter cards) without the need
to individually configure each parameter (e g Inter-
rupt IO Address etc) This allows for configuration
ease-of-use which results in minimal time associat-
ed with installation
The 82595TX’s packaging and power management
features are designed to consume minimal board
real estate and system power This is required for
applications such as portable PC motherboard de-
signs and PCMCIA cards which require a solution
with very low real estate and power consumption
The 82595TX package is a 144-lead tQFP (thin
Quad Flat Pack) Its dimensions are 20 mm by
20 mm and 1 7 mm in height (roughly the same area
as a US Nickel and the same height as a US Dime)
The 82595TX contains two power down modes an
SL compatible power down mode which utilizes the
SL SMOUT input and a POWER DOWN command
for non-SL systems
1 2 Enhancements to the 82595
The 82595TX is fully backwards compatible to the
82595 both in pinout and software However the
82595TX contains several advanced functions from
the 82595 which increase performance and ease of
use The following is a list of the major enhance-
ments to the 82595TX
Concurrent Processing Functionality
32-Bit Local Memory IO Port
Integrated Plug N’ Play support
Added EEPROM Interface for Plug N’ Play
Flash addressing up to 1 Mbyte (versus 256K for
82595)
For further information on these enhancements
and a description of all the differences between
the 82595 and 82595TX please consult the
82595TX User’s Manual available through your
local sales representative
1 3 Compliance to Industry Standards
The 82595TX has two interfaces the host system
interface which is an ISA or PCMCIA bus interface
and the serial or network interface Both interfaces
have been standardized by the IEEE
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