82595TX Datasheet, PDF (14/59 Pages) Intel Corporation – ISA/PCMCIA HIGH INTEGRATION ETHERNET CONTROLLER

82595TX
2 8 82595TX Pin Summary
ISA PCMCIA Bus Interface
ISA
Pin Name
MUXed
PCMCIA
Pin Name
Pin
Type
P-Down
State
SA0 – SA11 (In) A0–A9 (In)
Inactive
SA14 – 16 (In)
Inactive
SA17 (In)
REG (In)
Inactive Act⁽¹⁾
SA18 (In)
CE1 (In)
Inactive Act⁽¹⁾
SA19 (In)
CE2 (In)
Inactive
SD0 – SD15 (I O) D0–D15 (I O) TS TS
SMEMR (In)
OE (In)
Inactive
SMEMW (In)
WE (In)
Inactive
IOR (In)
IORD (In)
Inactive
IOW (In)
IOWR (In)
Inactive Act⁽¹⁾
INT0 (Out)
IREQ (Out)
TS TS
INT1 – 4 (Out)
TS TS
RESET DRV (In) RESET (In)
Act
IOCS16 (Out) IOIS16 (Out) OD TS TS
BALE (In)
Inactive
IOCHRDY (Out) WAIT (Out) OD 2S TS
SBHE (In)
EVENT (Out) 2S Inactive TS
AEN (In)
Inactive Act⁽¹⁾
MEMR (In)
Inactive
MEMW (In)
Inactive
NOTE
1 For hardware powerdown using SMOUT these pins will
be inactive For software powerdown these pins remain
active
Local Memory Interface
Pin Name
MUXed
Pin Name
Pin P-Down
Type State
MADDR0 – 3 (Out) FADDR14–17 (Out) 2S
TS
MADDR4 (Out) FOE (Out)
2S
TS
MADDR5 – 8 (Out) FL IADATA4–7 (In) TS
TS
MDATA0 (I O) EEPROM1SK(Out) TS
TS
MDATA1 (I O) EEPROM1DO(In)
TS
TS
MDATA2 (I O) EEPROM1DI(Out) TS
TS
MDATA3 (I O)
TS
TS
WE (Out)
FWE (Out)
2S
TS
RAS (Out)
2S
PU
CAS (Out)
FADDR18 (Out)
2S
PU
BOOTCS (Out)
2S
PU
IAPROMCS (Out) SA11 (In) (Dual)
2S
PU
EEPROMCS (I O)
TS
PD
FADDR19 (Out)
TS
TS
Miscellaneous Control
Pin Name
MUXed
Pin
Name
Pin
Type
P-Down
State
Dual
Pin Name
DIRL (Out)
DIRH (Out)
J0(In)
J1 (I O)
J2 (I O)
SMOUT (I O)
PCMCIA ISA (In)
2S PU
2S PU
ACT EEPROM2D0
(In)
TS TS EEPROM2DI
(Out)
TS TS EEPROM2SK
(Out)
TS ACT TS
ACT
Pin Name
TMS (In)
TCK (In)
TDI (In)
TDO (Out)
JTAG Control
MUXed
Pin Name
Pin
Type
2S
P-Down
State
In Act
In Act
In Act
Pin Name
TRMT (Out)
TRMT (Out)
RCV (In)
RCV (In)
CLSN (In)
CLSN (In)
TDH (Out)
TDL (Out)
TDH (Out)
TDL (Out)
RD (In)
RD (In)
X1 (In)
X2 (Out)
LILED (Out)
POLED (Out)
ACTLED (Out)
AUILED (Out)
Serial Interface
MUXed
Pin Name
Pin
Type
Ana
Ana
Ana
Ana
Ana
Ana
Ana
Ana
Ana
Ana
Ana
Ana
2S
2S
2S
2S
BNC DIS (Out) 2S
P-Down
State
TS
TS
In Act
In Act
In Act
In Act
TS
TS
TS
TS
In Act
In Act
In Act
TS
TS
TS
TS
TS
Legend
TS TriState
OD Open Drain
2S Two State will be found in either a 1 or 0 logic level
Ana Analog pin (all serial interface signals)
Act Input buffer is active during Power Down
In Act Input buffer is inactive during Power Down
PU Output in inactive state with weak internal Pull-up during Power Down
PD Output in inactive state with weak internal Pull-down during Power Down
Dual Dual function pin
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