82595TX Datasheet, PDF (20/59 Pages) Intel Corporation – ISA/PCMCIA HIGH INTEGRATION ETHERNET CONTROLLER

82595TX
priate bank the processor can write directly to any
of the 82595TX registers by simply issuing an OUT
instruction to the IO address of the register
4 3 Reading from the 82595TX
Reading from the 82595TX is accomplished by an
IO Read instruction (such as an IN instruction) from
the host processor to one of the 82595TX registers
When reading from a particular register the proces-
sor must first select the correct bank (Bank 0 1 or 2)
in which the register resides Once in the appropri-
ate bank the processor can read directly from any
of the 82595TX registers by simply issuing an IN in-
struction to the IO address of the register
4 4 1 WRITING TO LOCAL MEMORY
The local memory of an 82595TX solution is written
to whenever the host CPU performs a Write opera-
tion to the 82595TX Local Memory IO Port Prior to
writing a block of data to the local memory the CPU
should update the 82595TX Host Address Register
with the first address to be written The CPU then
copies the data to the local memory by writing it to
the 82595TX Local Memory IO Port The addressing
to the local memory is provided by the Host Address
Register which is automatically incremented by the
82595TX upon completion of each write cycle This
allows sequential accesses to the local memory
even though the IO port address accessed does not
change
4 4 Local DRAM Accesses
IO mapping the local DRAM memory of an 82595TX
solution allows it to appear as simply an IO Port to
the host system This allows an 82595TX solution to
work in PCs which do not have enough space in
their system memory map to accommodate the ad-
dition of LAN buffer memory (typically 16 Kbytes to
64 Kbytes) into the map The entire local memory
(up to 64 Kbytes) is mapped into one 16-bit IO Port
location For all IO-mapped accesses to the local
memory of a 82595TX solution the 82595TX per-
forms the IO address decoding and the ISA Bus in-
terface handshake and asserts the address and
control signals to the local memory
4 4 2 READING FROM LOCAL MEMORY
The local memory of an 82595TX solution is read
from whenever the host CPU performs a Read oper-
ation from the 82595TX Local Memory IO Port Prior
to reading a block of data from the local memory
the CPU should utilize the 82595TX Host Address
Register to point to first address to be read The
CPU then reads the data from the local memory
through the 82595TX Local Memory IO Port The
addressing to the local memory is provided by the
Host Address Register which is automatically incre-
mented by the 82595TX upon completion of each
read cycle
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