82595TX Datasheet, PDF (34/59 Pages) Intel Corporation – ISA/PCMCIA HIGH INTEGRATION ETHERNET CONTROLLER

82595TX
9 0 SERIAL INTERFACE
The 82595TX’s serial interface subsystem incorpo-
rates all the active circuitry required to interface the
82595TX to 10BASE-T networks or to the attach-
ment unit (AUI) interface It includes on-chip AUI and
TPE drivers and receivers as well as Manchester
Encoder Decoder and Clock Recovery circuitry The
AUI port can be connected to an Ethernet Trans-
ceiver cable drop to provide a fully compliant IEEE
802 3 AUI interface The AUI port can also be inter-
faced to a transceiver to provide a fully compliant
IEEE 802 3 10BASE2 (Cheapernet) interface The
TPE port provides a fully compliant 10BASE-T inter-
face The 82595TX automatically enables either the
AUI or TPE interface depending on which medium is
active This automatic selection can be overridden
by software configuration The TPE interface also
features a polarity fault detection and correction cir-
cuit which will detect and correct a polarity error on
the twisted pair wire the most common wiring fault
in twisted pair networks
A 20 MHz parallel resonant crystal is used to control
the clock generation oscillator which provides the
basic 20 MHz clock source An internal divide-by-
two counter generates the 10 MHz g0 01% clock
required by the IEEE 802 3 specification
We recommend that a crystal that meets the follow-
ing specifications be used
 Quartz Crystal
 20 00 MHz g0 002% at 25 C
 Accuracy g0 005% over Full Operating Temper-
ature 0 C to ^a70 C
 Parallel resonant with 20 pF Load Fundamental
Mode
Several vendors have such crystals either off-the-
shelf or custom-made Two possible vendors are
1 M-Tron Industries Inc
Yankton SD 57078
Specifications
Part No HC49 with 20 MHz 50 PPM over 0 C to
a_{70 C and 20 pF fundamental load}
2 Crystek Corporation
100 Crystal Drive
Ft Myers FL 33907
Part No 013212
The accuracy of the Crystal Oscillator frequency de-
pends on the PC board characteristics therefore it
is advisable to keep the X1 and X2 traces as short
as possible The optimum value of C1 and C2 should
be determined experimentally under nominal operat-
ing conditions The typical value of C1 and C2 is
between 22 pF and 35 pF
An external 20 MHz MOS-level clock may be applied
to pin X1 if pin X2 is left floating
A summary of the 82595TX’s serial interface subsections functions is shown below
 Manchester Encoder Decoder and Clock
Recovery
 Diagnostic Loopback
 Reset-Low-Power Mode
 Network Status Indicators
 Defeatable Jabber Timer
 User Test Modes
 Complies with IEEE 802 3 AUI Standard
Direct Interface to AUI Transformers
On-Chip AUI Squelch
 Complies with IEEE 802 3 10BASE-T for
Twisted Pair Ethernet
Selectable Polarity Detection and
Correction
Direct Interface to TPE Analog Filters
On-Chip TPE Squelch
Defeatable Link Integrity for Pre-Standard
Networks
Supports 4 LEDs (Link Integrity Activity
AUI BNC DIS and Polarity Correction)
34