TC1762 Datasheet, PDF (97/114 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller TriCore

TC1762
Preliminary
Electrical Parameters
4.3.4 Power, Pad and Reset Timing
Table 4-12 provides the characteristics of the power, pad and reset timing in the
TC1762.
Table 4-12 Power, Pad and Reset Timing Parameters
Parameter
Symbol
Limit Values
Unit
Min.
Max.
Min. V_DDP voltage to ensure defined
pad states¹⁾
Oscillator start-up time²⁾
Minimum PORST active time after
power supplies are stable at operating
levels
V_DDPPA
t_OSCS
t_POA
CC 0.6
CC –
SR 10
–
V
10
ms
–
ms
HDRST pulse width
t_HD
CC 1024 clock –
f_SYS
cycles³⁾
PORST rise time
t_POR
SR –
50
ms
Setup time to PORST rising edge⁴⁾ t_POS
SR 0
–
ns
Hold time from PORST rising edge⁴⁾ t_POH
SR 100
–
ns
Setup time to HDRST rising edge⁵⁾ t_HDS
SR 0
–
ns
Hold time from HDRST rising edge⁵⁾ t_HDH
SR 100 +
–
ns
(2 × 1/f_SYS)
Ports inactive after PORST reset
t_PIP
active⁶⁾⁷⁾
CC –
150
ns
Ports inactive after HDRST reset
active⁸⁾
Minimum V_DDP PORST activation
threshold.⁹⁾
t_PI
CC –
V_PORST3.3 SR –
150 +
ns
5 × 1/f_SYS
2.9
V
Minimum V_DD PORST activation
threshold. ⁹⁾
V_PORST1.5 SR –
1.32
V
Power-on Reset Boot Time¹⁰⁾
t_BP
CC 2.15
3.50
ms
Hardware/Software Reset Boot Time t_B
at f_CPU=80MHz¹¹⁾
CC 500
800
µs
Hardware/Software Reset Boot Time t_B
at f_CPU=66MHz¹¹⁾
CC 560
860
µs
1) This parameter is valid under assumption that PORST signal is constantly at low-level during the power-
up/power-down of the V_DDP.
Data Sheet
93
V1.0, 2008-04