TC1762 Datasheet, PDF (60/114 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller TriCore

TC1762
Preliminary
Functional Description
3.18
Boot Options
The TC1762 booting schemes provide a number of different boot options for the start of
code execution. Table 3-2 shows the boot options available in the TC1762.
Table 3-2 TC1762 Boot Selections
BRKIN HWCFG TESTMODE Type of Boot
[3:0]
BootROM
Exit Jump
Address
Normal Boot Options
1
0000_B
1
Enter bootstrap loader mode 1: D400 0000_H
Serial ASC0 boot via ASC0 pins
0001_B
Enter bootstrap loader mode 2:
Serial CAN boot via P3.12 and
P3.13 pins
0010_B
0011_B
Start from internal PFLASH
Alternate boot mode (ABM): Start
from internal PFLASH after CRC
check is correctly executed; enter
a serial bootstrap loader mode¹⁾ if
CRC check fails
A000 0000_H
Defined in
ABM header
or D400 0000_H
1111_B
Enter bootstrap loader mode 3:
Serial ASC0 boot via P3.12 and
P3.13 pins
D400 0000_H
others
Reserved; execute stop loop
–
Debug Boot Options
0
0000_B
1
others irrel.
Tri-state chip
–
Reserved; execute stop loop
–
1) The type of the alternate bootstrap loader mode is selected by the value of the SCU_SCLIR.SWOPT[2:0] bit
field, which contains the levels of the P0.[2:0] latched in with the rising edge of the HDRST.
Data Sheet
56
V1.0, 2008-04