HYB25D128160CT Datasheet, PDF (70/85 Pages) Infineon Technologies AG – 128 Mbit Double Data Rate SDRAM

HYB25D128[400/800/160]C[C/E/T](L)
128 Mbit Double Data Rate SDRAM
Electrical Characteristics
Table 21
Symbol
I_DD0
I_DD1
I_DD2P
I_DD2F
I_DD2Q
I_DD3P
I_DD3N
I_DD4R
I_DD4W
I_DD5
I_DD6
I_DD7
I_DD Specification
–7
–6
DDR266A
DDR333
Typ. Max. Typ. Max.
50
65
60
75
55
65
65
75
65
75
70
85
70
85
80
95
3
4
3.5
4.5
20
24
25
30
15
21
17
24
9
13
11
15
28
36
32
38
30
40
36
45
60
70
70
85
70
85
85
100
65
75
75
90
75
90
90
110
100
140
120
160
1.4
2.8
1.4
2.8
1.1
1.1
1.1
1.1
140
170
180
215
140
170
180
215
–5
DDR400B
Typ. Max.
70
90
75
90
80
100
95
110
4
5
30
36
20
28
13
18
38
45
43
54
85
100
100
120
90
105
100
130
140
190
1.4
2.8
210
250
210
250
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
Note/Test Condition¹⁾
×4/×8 ²⁾³⁾
×16
×4/×8 ²⁾³⁾
×16
2)3)
2)3)
2)3)
2)3)
×4/×8 ²⁾³⁾
×16
×4/×8 ²⁾³⁾
×16
×4/×8 ²⁾³⁾
×16
2)3)
standard version ²⁾³⁾⁴⁾
low power version
×4/×8 ²⁾³⁾
×16
1) Test conditions for typical values: VDD = 2.5 V ( DDR266, DDR333), VDD = 2.6 V (DDR400), TA = 25 °C, test conditions
for maximum values: VDD = 2.7 V, TA = 10 °C
2) IDD specifications are tested after the device is properly initialized and measured at 133 MHz for DDR266, 166 MHz for
DDR333, and 200 MHz for DDR400.
3) Input slew rate = 1 V/ns.
4) Enables on-chip refresh and address counters.
Data Sheet
70
Rev. 1.0, 2004-04