92HD99B Datasheet, PDF (212/225 Pages) Integrated Device Technology – SINGLE CHIP PC AUDIO SYSTEM

92HD99
SINGLE CHIP PC AUDIO SYSTEM, CODEC+SPEAKER AMPLIFIER+CAPLESS HP+LDO
7.29.1.17. MUTE Register
Prior to WC revision, this register reset by POR/DAFG/ULR. WC revision, reset by POR only. Writing
to NID22h verb 77F will cause reset on all silicon revisions.
Register Address
verb F92/792
Bit
Label
7:3 Reserved
2
Mute
1
mute1
0
mute0
Type Default
RO 0x0
RESERVED
RW 0
1 = mute all channels
RW 0
1 = mute ch1
RW 0
1 = mute ch0
Description
7.29.1.18. ATTEN Register
Prior to WC revision, this register reset by POR/DAFG/ULR. WC revision, reset by POR only. Writing
to NID22h verb 77F will cause reset on all silicon revisions.
Register Address
Bit
Label
verb F93/793
7:0 atten
Type Default
Description
RW 0x0
Attenuation. Each bit represents 0.5dB of attenuation to be
applied to the channel. The range will be -125dB to 2dB as
follows:
0x00: +2dB
0x01: +1.5dB
0x02: +1.0dB
...
0x47: -33.5dB
0x48: -34.0dB
0x49: -34.5dB
...
0xFE: -125dB
0xFF: Hard Master Mute
7.29.1.19. DC_COEF_SEL Register
Prior to WC revision, this register reset by POR/DAFG/ULR. WC revision, reset by POR only. Writing
to NID22h verb 77F will cause reset on all silicon revisions.
Register Address
Bit
Label
7:3 Reserved
verb F94/794
2:0 dc_coef_sel
Type Default
Description
RO 0
RESERVED
RW 0x5
0:dc_coef = 24’h100000;
//2^^-3 = 0.125
1:dc_coef = 24’h040000;
2:dc_coef = 24’h010000;
3:dc_coef = 24’h004000;
4:dc_coef = 24’h001000;
5:dc_coef = 24’h000400;
6:dc_coef = 24’h000100;
//2^^-15 = 0.000330517
7:dc_coef = 24’h000040;
//2^^-17
IDT CONFIDENTIAL
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92HD99