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92HD99B Datasheet, PDF (57/225 Pages) Integrated Device Technology – SINGLE CHIP PC AUDIO SYSTEM
92HD99
SINGLE CHIP PC AUDIO SYSTEM, CODEC+SPEAKER AMPLIFIER+CAPLESS HP+LDO
Field Name
Offset
Bits
R/W
Default
6:0
R
00h
Indicates which step is 0dB
Reset
N/A (Hard-coded)
7.4.6. AFG (NID = 01h): PwrStateCap
Reg Byte 4 (Bits 31:24) Byte 3 (Bits 23:16) Byte 2 (Bits 15:8)
Set
Get
F000Fh
Byte 1 (Bits 7:0)
Field Name
EPSS
ClkStop
S3D3ColdSup
Rsvd
D3ColdSup
D3Sup
D2Sup
D1Sup
D0Sup
Bits
R/W
Default
Reset
31
R
1h
N/A (Hard-coded)
Extended power states support: 1 = yes, 0 = no.
30
R
1h
N/A (Hard-coded)
D3 clock stop support: 1 = yes, 0 = no.
29
R
1h
N/A (Hard-coded)
Codec state intended during system S3 state: 1 = D3Hot, 0 = D3Cold.
28:5
R
000000h
N/A (Hard-coded)
Reserved.
4
R
1h
N/A (Hard-coded)
D3Cold power state support: 1 = yes, 0 = no.
3
R
1h
N/A (Hard-coded)
D3 power state support: 1 = yes, 0 = no.
2
R
1h
N/A (Hard-coded)
D2 power state support: 1 = yes, 0 = no.
1
R
1h
N/A (Hard-coded)
D1 power state support: 1 = yes, 0 = no.
0
R
1h
N/A (Hard-coded)
D0 power state support: 1 = yes, 0 = no.
IDT CONFIDENTIAL
57
©2009 INTEGRATED DEVICE TECHNOLOGY, INC.
V1.2 1/12
92HD99