92HD99B Datasheet, PDF (81/225 Pages) Integrated Device Technology – SINGLE CHIP PC AUDIO SYSTEM

92HD99
SINGLE CHIP PC AUDIO SYSTEM, CODEC+SPEAKER AMPLIFIER+CAPLESS HP+LDO
7.4.31. AFG (NID = 01h): AnaBeep
Reg Byte 4 (Bits 31:24) Byte 3 (Bits 23:16) Byte 2 (Bits 15:8)
Set
7EFh
Get
FEE00h / FEE00h
Byte 1 (Bits 7:0)
7EEh
Field Name
Rsvd2
Detect
GainAdj
ConvertEn
DetectEn
Rsvd1
Gain
CntSel
Mode
Bits
R/W
Default
Reset
31:14
R
00000h
N/A (Hard-coded)
Reserved.
13
R
0h
POR - DAFG - ULR
0: no beep present; 1: beep present.
12:10
RW
3h
POR
Analog PC Beep Gain in digital side 7h = -6dB, 6h = -12dB, 5h = -18dB, 4h = -24dB, 3h
= -30dB, 2h = -36dB, 1h = -42dB, 0h = -48dB.
9
RW
1h
POR
Analog pc beep quantization enable (enabled only when both
""d2a_ana_pc_beep_det_en"" and ""d2a_ana_pc_beep_convert_en"" are 1).
8
RW
1h
POR
Analog pc beep detection enable 0h = disable 1h = enable.
7:6
R
0h
N/A (Hard-coded)
5:4
RW
3h
POR
Analog PC Beep Gain: 0h = -24dB, 1h = -18dB, 2h = -12dB, 3h = -6dB.
3:2
RW
0h
POR
Select counter delay.0h=64ms,1h = 128ms, 2h = 256ms, 3h = 512ms.
1:0
RW
2h
POR
Analog PC Beep Mode:
00b = Always disabled
01b = Always enabled
1Xb = Enabled during HDA Link Reset only
IDT CONFIDENTIAL
81
©2009 INTEGRATED DEVICE TECHNOLOGY, INC.
V1.2 1/12
92HD99