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92HD99B Datasheet, PDF (41/225 Pages) Integrated Device Technology – SINGLE CHIP PC AUDIO SYSTEM
92HD99
SINGLE CHIP PC AUDIO SYSTEM, CODEC+SPEAKER AMPLIFIER+CAPLESS HP+LDO
Parameter
Conditions
Min Typ Max Unit
VREFILT (VAG)
0.45 X
AVdd
V
Phased Locked Loop
PLL lock time
96
200
usec
PLL (or HD Audio Bit CLK) 24MHz clock
jitter
150
500
psec
ESD / Latchup
IEC1000-4-2
1
Level
JESD22-A114-B
2
Class
JESD22-C101
4
Class
Table 17. 92HD99 Analog Performance Characteristics
1.Dynamic Range is the ratio of the full scale signal to the noise output with a -60dBFS signal as defined in AES17 as SNR in
the presence of signal and outlined in AES6id, measured “A weighted” over 20 Hz to 20 kHz bandwidth
2.Ratio of Full Scale signal to idle channel noise output is measured “A weighted” over a 20 Hz to a 20 kHz bandwidth.
(AES17-1991 Idle Channel Noise or EIAJ CP-307 Signal-to-noise Ratio).
3.THD+N ratio as defined in AES17 and outlined in AES6id,non-weighted, over 20 Hz to 20 kHz bandwidth.Results at the jack
are dependent on external components and will likely be 1 - 2dB worse.
4.Peak-to-Peak Ripple over Passband meets ± 0.125dB limits, 48 kHz or 44.1 kHz Sample Frequency. 1dB limit.
5.Peak-to-Peak Ripple over Passband meets ± 0.125dB limits, 48 kHz or 44.1 kHz Sample Frequency. 1dB limit.
6.Stop Band rejection determines filter requirements. Out-of-Band rejection determines audible noise.
7.The integrated Out-of-Band noise generated by the DAC process, during normal PCM audio playback, over a bandwidth 28.8
to 100 kHz, with respect to a 1 Vrms DAC output.
8.± 1dB limits for Line Output & 0 dB gain, at -20dBV
9.Spurious tone rejection is tested with ADC dither enabled and compared to ADC performance without dither.
10.All functions/converters active, pin complexes enabled, two FDX streams, line (10Kohm) loads. Add 24mA analog current per
stereo 32 ohm headphone.
11.One stereo DAC and corresponding pin widgets enabled (playback mode)
12.Mixer enabled
13.Idle measurement D3 set for minimum clicks/pops (biases and min. amps. on)
14.Can be set to 0.5 or 0.8 AVdd.
3.3. Class-D BTL Amplifier Performance
Parameter
Min
Output Power (BTL 4 ohm, 5V)
2
Amplifier Efficiency (4, 5V, 2W)
THD+N (BTL 4, 5V, FS)
THD+N (BTL 4, 5V, -3dBFS)
Frequency Response
20
PWM frequency
Output voltage noise (4, 5V)
Idle current
Shutdown current
Typ
88
0.3
-
352.8
65
3.6
0
Max
Unit
W
%
1
%
%
20K
Hz
KHz
uV
mA
mA
Table 18. Class-D BTL Amplifier Performance
IDT CONFIDENTIAL
41
©2009 INTEGRATED DEVICE TECHNOLOGY, INC.
V1.2 1/12
92HD99