English
Language : 

92HD99B Datasheet, PDF (63/225 Pages) Integrated Device Technology – SINGLE CHIP PC AUDIO SYSTEM
92HD99
SINGLE CHIP PC AUDIO SYSTEM, CODEC+SPEAKER AMPLIFIER+CAPLESS HP+LDO
Field Name
Control2
Control1
Control0
Bits
R/W
Default
Reset
2
RW
0h
POR - DAFG - ULR
Direction control for GPIO2: 0 = GPIO is configured as input; 1 = GPIO is con-
figured as output
1
RW
0h
POR - DAFG - ULR
Direction control for GPIO1: 0 = GPIO is configured as input; 1 = GPIO is con-
figured as output
0
RW
0h
POR - DAFG - ULR
Direction control for GPIO0: 0 = GPIO is configured as input; 1 = GPIO is con-
figured as output
7.4.14. AFG (NID = 01h): GPIOWakeEn
Reg Byte 4 (Bits 31:24) Byte 3 (Bits 23:16) Byte 2 (Bits 15:8)
Set
Get
F1800h
Byte 1 (Bits 7:0)
718h
Field Name
Rsvd
W4
W3
W2
Bits
R/W
Default
Reset
31:5
R
00000000h
N/A (Hard-coded)
Reserved.
4
RW
0h
POR - DAFG - ULR
Wake enable for GPIO4: 0 = wake-up event is disabled; 1 = When HD Audio
link is powered down (RST# is asserted), a wake-up event will trigger a Status
Change Request event on the link.
3
RW
0h
POR - DAFG - ULR
Wake enable for GPIO3: 0 = wake-up event is disabled; 1 = When HD Audio
link is powered down (RST# is asserted), a wake-up event will trigger a Status
Change Request event on the link.
2
RW
0h
POR - DAFG - ULR
Wake enable for GPIO2: 0 = wake-up event is disabled; 1 = When HD Audio
link is powered down (RST# is asserted), a wake-up event will trigger a Status
Change Request event on the link.
IDT CONFIDENTIAL
63
©2009 INTEGRATED DEVICE TECHNOLOGY, INC.
V1.2 1/12
92HD99