92HD99B Datasheet, PDF (62/225 Pages) Integrated Device Technology – SINGLE CHIP PC AUDIO SYSTEM

92HD99
SINGLE CHIP PC AUDIO SYSTEM, CODEC+SPEAKER AMPLIFIER+CAPLESS HP+LDO
Field Name
Mask4
Mask3
Mask2
Mask1
Mask0
Bits
R/W
Default
Reset
4
RW
0h
POR - DAFG - ULR
Enable for GPIO4: 0 = pin is disabled (Hi-Z state); 1 = pin is enabled; behavior
determined by GPIO Direction control
3
RW
0h
POR - DAFG - ULR
Enable for GPIO3: 0 = pin is disabled (Hi-Z state); 1 = pin is enabled; behavior
determined by GPIO Direction control
2
RW
0h
POR - DAFG - ULR
Enable for GPIO2: 0 = pin is disabled (Hi-Z state); 1 = pin is enabled; behavior
determined by GPIO Direction control
1
RW
0h
POR - DAFG - ULR
Enable for GPIO1: 0 = pin is disabled (Hi-Z state); 1 = pin is enabled; behavior
determined by GPIO Direction control
0
RW
0h
POR - DAFG - ULR
Enable for GPIO0: 0 = pin is disabled (Hi-Z state); 1 = pin is enabled; behavior
determined by GPIO Direction control
7.4.13. AFG (NID = 01h): GPIODir
Reg Byte 4 (Bits 31:24) Byte 3 (Bits 23:16) Byte 2 (Bits 15:8)
Set
Get
F1700h
Byte 1 (Bits 7:0)
717h
Field Name
Rsvd
Control4
Control3
Bits
R/W
Default
Reset
31:5
R
00000000h
N/A (Hard-coded)
Reserved.
4
RW
0h
POR - DAFG - ULR
Direction control for GPIO4: 0 = GPIO is configured as input; 1 = GPIO is con-
figured as output
3
RW
0h
POR - DAFG - ULR
Direction control for GPIO3: 0 = GPIO is configured as input; 1 = GPIO is con-
figured as output
IDT CONFIDENTIAL
62
©2009 INTEGRATED DEVICE TECHNOLOGY, INC.
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92HD99