STAC9758 Datasheet, PDF (20/119 Pages) Integrated Device Technology – HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS

STAC9758/9759
HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™
PC AUDIO
2.2.5.
Data Setup and Hold
(50 pF external load)
tco
T _setup
BIT_CLK
SDATA_OUT
SDATA_IN
SYNC
V
V
ih
il
V_oh
V _ol
T_hold
Figure 4. Data Setup and Hold Timing
Parameter
Setup to falling edge of BIT_CLK
Hold from falling edge of BIT_CLK
Symbol Min Typ Max Units
Tsetup
10
-
-
ns
Thold
10
-
-
ns
Note: Setup and hold time parameters for SDATA_IN are with respect to the AC'97 controller.
2.2.6.
Signal Rise and Fall Times
(BIT_CLK: 75 pF external load; from 10% to 90% of Vdd)
(SDATA_IN: 60 pF external load; from 10% to 90% of Vdd))
BIT_CLK
Triseclk
Tfallclk
SDATA_IN
Trisedin
Tfalldin
Figure 5. Signal Rise and Fall Times Timing
BIT_CLK rise time
BIT_CLK fall time
SDATA_IN rise time
SDATA_IN fall time
Parameter
Symbol Min Typ Max Units
Triseclk
-
-
6
ns
Tfallclk
-
-
6
ns
Trisedin
-
-
6
ns
Tfalldin
-
-
6
ns
IDT™
20
HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™
STAC9758/9759
V 1.2 1206