IC-MD_17 Datasheet, PDF (5/30 Pages) IC-Haus GmbH – 48-BIT QUADRATURE COUNTER

iC-MD 48-BIT QUADRATURE COUNTE^pR^reliminary
WITH RS422 RECEIVER AND SPI/BISS INTERFACE
Rev B1, Page 5/30
ELECTRICAL CHARACTERISTICS
Operating Conditions: VDD = 3 . . . 5.5 V, Tj = -40 . . . 125 °C, unless otherwise noted.
Item Symbol Parameter
No.
Conditions
General
001 VDD
Voltage Supply VDD
002 I(VDD) Supply Current in VDD
TTL input configuration, 48 bits counter
10 MHz signal in AP (0º phase) and AN
(90º phase), BP, BN, CP and CN to GND
003 Vc()hi
Clamp Voltage hi
Vc()hi = V() - VDD, I() = 1 mA, all pins
004 Vc()lo
Clamp Voltage lo
Vc()hi = V() - VDD, I() = 1 mA, all pins
Digital Inputs: MA, SLI, SCK, MOSI, NCS, TPI
101 Vt()hi
Input Threshold Voltage hi
102 Vt()lo
Input Threshold Voltage lo
VDD = 4.5 . . . 5.5 V
VDD = 3 . . . 5.5 V
103 Vt()hys Input Hysteresis
104 Ipd()
Input Pull-down Current at
SCK, MOSI, TPI
V() = 1 V . . . VDD
105 Ipu()
Input Pull-Up Current at
NCS, MA
V() = 0 V . . . VDD - 1 V
106 fclk(MA) Permissible Clock Frequency at ENSSI = 1 (SSI protocol)
MA
ENSSI = 0 (BiSS protocol)
107 Voc()
Pin Open Voltage at SLI
108 Ri()
Internal Resistance at SLI
Referenced to VDD
Referenced to GND
109 to(SLI) Digital Filter at SLI
SLI = open
110 fclk(SCK) Permissible Clock Frequency at
SCK
Bidirectional Pins: NWARN, NERR
201 Ipu()
Pull-Up Current
V() = 0 V . . . VDD - 1 V
202 Vt()hi
Input Threshold Voltage hi
203 Vt()lo
Input Threshold Voltage lo
VDD = 4.5 . . . 5.5 V
VDD = 3 . . . 5.5 V
204 Vt()hys Input Hysteresis
205 Vs()lo
Saturation Voltage lo
I() = 4 mA
206 Isc()lo
Short-Circuit Current lo
V() = 0 V . . . VDD
ABZ Counter
301 R()
Counter Resolution
302 fcnt()
Permissible Count Frequency
303 PHab2
Permissible A/B Phase Distance edge A vs. edge B and vice versa
TTL=1
TTL=0, LVDS=X
Power-Down Reset and Oscillator
601 VDDon Power-On Supply Voltage
602 VDDoff Power-Down Voltage
603 VDDhys Power-On Hysteresis
VDDon - VDDoff
604 f(CLK)
Internal Oscillator Frequency
VDD = 3.5 . . . 5.5 V
VDD = 3 . . . 3.5 V
Digital Outputs: SLO, MISO, ACT0, ACT1
701 Vs()hi
Saturation Voltage hi
Vs()hi = VDD - V(), I() = -4 mA
702 Vs()lo
Saturation Voltage lo
I() = 4 mA
703 Isc()hi
Short-Circuit Current hi
V() = 0 . . . VDD
704 Isc()lo
Short-Circuit Current lo
V() = 0 . . . VDD
Unit
Min. Typ. Max.
3
5.5
V
15
mA
0.4
1.5
V
-1.5
-0.25 V
2
V
0.8
V
0.75
V
150 250
mV
2
30
75
µA
-75 -30
-2
µA
4
MHz
10 MHz
42 46.5 51 %VDD
70
170 kΩ
40
110 kΩ
5
25
µs
10 MHz
-850 -100 -10
µA
2
V
0.8
V
0.75
V
150 250
mV
450 mV
4
100 mA
48
bit
40 MHz
5
ns
13
ns
2.9
V
2.1
V
35 100
mV
1.4
5.6 MHz
1.6
6.7 MHz
450 mV
450 mV
-115
mA
100 mA