IC-MD_17 Datasheet, PDF (28/30 Pages) IC-Haus GmbH – 48-BIT QUADRATURE COUNTER

iC-MD 48-BIT QUADRATURE COUNTE^pR^reliminary
WITH RS422 RECEIVER AND SPI/BISS INTERFACE
Rev B1, Page 28/30
VDD
VDD
RS-422/TTL RECEIVERS
REFERENCE-TO-REFERENCE
DATA I/O
AP
AP
MULTIPLEXER
COUNTER 24 Bit
AND
STATUS
ERROR
NERR
+
UPD Register
REGISTERS
-
AN
AN
BP
BP
REFCNT
REF Register
WARNING
NWARN
+
-
BN
BN
CP
+
-
CN
A0
CONFIGURABLE
B0
COUNTERS
Z0
CNT 0
CNT 1
CNT 2
24 Bit
-
-
A1
24 Bit
24 Bit
-
B1
48 Bit
-
-
Z1
32 Bit
-
-
32 Bit
16 Bit
-
A2
16 Bit
-
-
B2
16 Bit
16 Bit
-
16 Bit
16 Bit
16 Bit
ACTUATOR OUTPUT
ACT1
ACT0
SPI INTERFACE
SCK
NCS
MOSI
SCK
NCS
MOSI
iC-MD
TPI
ENTP
&
TOUCH PROBE
TP1
TP2
SERIAL INTERFACE
BiSS C
SSI
MISO
SLO
SLI
MISO
MA
GND
GND
Figure 14: SPI only operation with unused constant pulled index input
Optional ”SPI only” operation setup
Figure 14 shows an SPI only configuration. All trigger events or status requests need to be accessed over the SPI
interface.
• Default State of the BiSS Interface
– Pull up resistor on input pin MA
– Pull down resistor on input pin SLI
• On unused pin TPI:
– Pull up resistor on input pin TPI
Optional unused index setup
Figure 14 shows a deactivated index input pins biasing for CP CN on differential input signals. The logic state of
the index input is then 0.
• On unused counter pins CP CN with RS-422 receiver setup:
– Pull down resistor on the positive input pin CP
– Pull up resistor on the positive input pin CN
– Consider INVZ0 = 0 signal configuration
– Consider CFGZ = 0 signal configuration
• On unused counter pins with TTL/CMOS receiver setup:
– Pull down resistor on input pin BP and CN
– Consider INVZx = 0 signal configuration
– Consider CFGZ = 0 signal configuration