IC-MD_17 Datasheet, PDF (23/30 Pages) IC-Haus GmbH – 48-BIT QUADRATURE COUNTER

iC-MD 48-BIT QUADRATURE COUNTE^pR^reliminary
WITH RS422 RECEIVER AND SPI/BISS INTERFACE
Rev B1, Page 23/30
The data length to be written is always 8 bit, but it is possible to transmit several bytes of data consecutively if the
NCS signal is not reset and SCLK continues being clocked. The address transmitted is then the start address
which is internally increased by 1 following each transmitted byte.
The data length to be read after the read instruction is variable:
Address 0x0A, 0x0C, 0x0E: 24 bit + 2 bit data length
For TP1, TP2 and UPD registers the single SPI read requires a transfer of 26 bit in one sequence.
Example: UPD = 24 bit + NERR + NWARN SPI data access
SPI READ DATA UPD(23:0) + NERR + NWARN
Adr
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Measurement Data (SPI read only)
0x0A
UDP(23:16)
UDP(15:8)
UDP(7:0)
NERR
NWARN
0b00.0000
Bit 1
Bit 0
Table 60: Register layout
Address 0x08: variable data length
For counter data, it depends on the counter configuration CNTCFG (Adr. 0x00 bit (2:0)) how many bits this single
transfer needs to clock out. See the table 61. The total length is CNT length + 2 bit (NERR, NWARN). Additional
bits may be clocked out as a full byte.
CNTCFG
0b000
0b001
0b010
0b011
0b100
0b101
0b110
0b111
Counter Configuration
CNT0 = 24 bit
CNT1 = 24 bit
CNT0 = 24 bit
CNT0 = 48 bit
CNT0 = 16 bit
CNT0 = 32 bit
CNT1 = 32 bit
CNT0 = 16 bit
CNT1 = 16 bit CNT0 = 16 bit
CNT2 = 16 bit CNT1 = 16 bit CNT0 = 16 bit
Total CNT length
24 bit
48 bit
48 bit
16 bit
32 bit
48 bit
32 bit
48 bit
Table 61: SPI Counter Data Position