IC-MD_17 Datasheet, PDF(13/30 Page) IC-Haus GmbH

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

IC-MD_17 Datasheet, PDF (13/30 Pages) IC-Haus GmbH – 48-BIT QUADRATURE COUNTER

◁

iC-MD 48-BIT QUADRATURE COUNTEpRreliminary

WITH RS422 RECEIVER AND SPI/BISS INTERFACE

INPUT CONFIGURATION

Rev B1, Page 13/30

The input stage for the incremental signals ABZ is con-

figurable as single-ended TTL and differential (RS-422

or LVDS). Differential inputs are possible only for a sin-

gle counter configuration and the input configuration

shown in table 18.

TTL

Code

Addr. 0x01; bit (7)

Function

Differential inputs

TTL inputs

Default = 0b0

Table 17: TTL Inputs

The configuration bit EXCH exchanges the input A and

the input B of the counters. The default counting direc-

tion is positive in clockwise (CW) direction (A edge take

place before B edge). But it is also possible to change

the counting direction with the register EXCH. See table

21, table 22 and table 23.

EXCH0

Code

Addr. 0x00; bit (3)

Default = 0b0

Function

Exchange AB CNT0 (CW positive)

Exchange AB CNT0 (CCW positive)

Counter

1xDifferential AP AN BP BN CP CN

Table 21: Exchange AB Inputs Channel on Counter

CNT0

Table 18: RS422 or LVDS Input Counters Configuration

If two or more counter are configured, the TTL in-

put configuration shown in table 20 must be used

and table 13 shows all the possible counter config-

uration.

EXCH1

Code

Addr. 0x00; bit (4)

Default = 0b0

Function

Exchange AB CNT1 (CW positive)

Exchange AB CNT1 (CCW positive)

Table 22: Exchange AB Inputs on Counter CNT1

It is possible to configure the differential input stage of

iC-MD in two different modes; differential RS-422 and

differential LVDS. See table 19.

LVDS

Code

Notes

Addr. 0x03; bit (7)

Function

Differential RS-422 inputs

Differential LVDS inputs

condition: TTL=0

Default = 0b0

Table 19: LVDS/RS-422 Inputs

EXCH2

Code

Addr. 0x00; bit (5)

Default = 0b0

Function

Exchange AB CNT2 (CW positive)

Exchange AB CNT2 (CCW positive)

Table 23: Exchange AB Inputs on Counter CNT2

The index (Z) signal can be inverted as shown in table

24 and table 25 with the register bits INVZ(1:0).

Counters A0 B0 Z0 A1 B1 Z1 A2 B2

1xTTL AP AN BP - - - - -

2xTTL AP AN BP BN CP CN - -

3xTTL AP AN - BP BN - CP CN

INVZ0

Code

Addr. 0x00; bit (6)

Function

Non inverted Z on CNT0

Inverted Z on CNT0(Z=0 active)

Default = 0b0

Table 24: Invert Z Signal Counter CNT0

Table 20: TTL Input Counters Configuration

Note that the three counters configuration donât imple-

ment any Zero signal. It has only A and B input signals.

quadrature input signals.

INVZ1

Code

Addr. 0x00; bit (7)

Function

Non inverted Z on CNT1

Inverted Z on CNT1(Z=0 active)

Default = 0b0

Table 25: Invert Z Signal Counter CNT1

▷