IC-JX_16 Datasheet, PDF (16/48 Pages) IC-Haus GmbH – 16-FOLD 24 V HIGH-SIDE DRIVER

iC-JX
16-FOLD 24 V HIGH-SIDE DRIVER WITH µC INTERFACE
REGISTER DETAILS
Rev C2, Page 16/48
The register contents and configuration possibilities are described in this chapter. A detailed description of the
chip functions can be found in the chapter DESCRIPTION OF FUNCTIONS. The order of the register description
is:
1. Configuration of the chip functions (I/O pins, filters, ADC, Output)
2. Status messages (general and those enabled for interrupt)
3. Interrupt configuration and interrupt messages
4. Interconnection Error and Device ID
General remark regarding the following register tables:
’-’ is used for spare storage space with no function; ’0’ after reset.
(r) is used to mark the reset entry.
Control Word 1: I/O filters
Control Word 1A (I/O filters)
Bit
Name
Nibble 1:
I/O-Pins 5..8
7
6
BYP1
-
Nibble 0:
I/O-Pins 1..4
5
4
3
2
FH1
FH0
BYP0
-
Addr. 0x14
reset entry: 0x00
1
0
FL1
FL0
Control Word 1A: Nibble 1
Bit7
0
I/O filters active
(r)
BYP1
1
Bypass for I/O filters: the I/O signals are reprocessed in their unfiltered state.
Bit5..4
FH1
FH0
Filter time¹
FH1..0
0
0
(14.5
±
1)
∗
1
f (SECLK)
≈ 11.6 ± 0.8 us^a
(r)
0
1
(896.5
±
64)
∗
1
f (SECLK)
≈ 717.2 ± 51.2 us^a
1
0
(3584.5
±
256)
∗
1
f (SECLK)
≈
2867.6
±
204.8
us^a
1
1
(7168.5
±
512)
∗
1
f (SECLK)
≈
5734.8
±
409.6
us^a
Control Word 1A: Nibble 0
Bit3
0
I/O filter active
(r)
BYP0
1
Bypass for I/O filters: the I/O signals are reprocessed in their unfiltered state.
Bit1..0
FL1
FL0
Filter time¹
FL1..0
0
0
(14.5
±
1)
∗
1
f (SECLK)
(r)
0
1
(896.5
±
64)
∗
1
f (SECLK)
1
0
(3584.5
±
256)
∗
1
f (SECLK)
1
1
(7168.5
±
512)
∗
1
f (SECLK)
1 _{SECLK: see Control Word 3B on page 20}
a _{Filter times derived from system clock configured with f(SECLK}1_{) @ 1.25MHz}