GMS84512 Datasheet, PDF (89/123 Pages) Hynix Semiconductor – 8-BIT SINGLE CHIP MICROCOMPUTER

GMS 84512 / 84524
4.3. Reset Function
To reset the device, maintain the RESET="L" at least 8 machine cycle after power supplying
and oscillation stabilization.
RESET terminal is organized as schmitt input.
TABLE 4.3.1 is, at Reset, initial value of each register, if initial value is undefined it is needed
initialize by a S/W.
Fig 4.3.1 is Timing of Reset Operation (Simular as interrupt instruction)
l CLOCK CONTROL REGISTER
CLOCK CONTROL REGISTER
CKCTLR
<00CE_H>
W
W
W
W
W
W
W
W
7
6
5
4
3
2
1
0
¦¡
¦¡ ^{WDTON ENPCK} BTCL BTS2 BTS1 BTS0
Initial Value (At Reset)
BITR : [ Undefined ]
CKCTLR : [ --01 0111 ]
B.I.T. value ( Read )
WDT Function Control( Initial Value )
0 : 6bit TIMER
Peripheral Clock Enable(Initial Value)
1 : Peripheral Clock Supply
B.I.T Input Clock Selection (Initial Value)
111 : PS11 ( 256§Á)
B.I.T. Clear ( Initial Value)
0 : B.I.T. FREE-RUN
System Clock
RESET
Instruction Fetch
Address Bus
Data Bus
Internal Read
?
?
?
?
?
?
?
FFFE FFFF Start
?
FE ADL ADH _Opcode
RESET Process Step
Main Program
FFFEH, is vector address and ADL, ADH is start address of main program as
vector contents
FIG. 4.1.1 RESET Operation Timing
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