GMS84512 Datasheet, PDF (50/123 Pages) Hynix Semiconductor – 8-BIT SINGLE CHIP MICROCOMPUTER

TDR2 VALUE
MATCH
GMS 84512 / 84524
MATCH
T2 VALUE
00_H
Clear
Clear
Clear
IFT2
T2ST
T2CN
COUNTER
Interrupt
Interrupt
“0”
“1” Clear & Start
“0” “1” Start
Count
Stop
Count Stop
Count
FIG 3.3.6 START/ STOP Control of Timer2
l The 16-bit interval timer is selected by assigning bit5(T3SL1) and bit4(T3SL0) to “0”. At
16-bit timer mode, iIFT2 interrupt only is valid. It is prefered to write to the TDR in non-
counting timer, in order to protect undesirable interrupt. If the input clock is selected among
PS2, PS4 and PS6, T2 and T3 operate as 16-bit interval timer, while if EC2 operate as 16-bit
event/counter.
< Notice >
1. On counting the reading value of TDR is counted value
2. 16-bit Mode, when data are read I the middle of Timer operation, the prior upper 8 bit data
are read. Next the lower 8-bit data are read, and then the upper 8 bit data are read once
again. If the earlier read upper 8-bit data are matched with the later read upper 8 bit data,
16-bit data are read correctly. If not, caution should be taken in the selection of upper
8-bit data.
( Example )
1 ) Upper 8 bit Read
2 ) Lower 8 bit Read
3 ) Upper 8 bit Read
0A
FF
0B
¡é
0AFF
0A
01
0B
¡é
0B01
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