GMS84512 Datasheet, PDF (40/123 Pages) Hynix Semiconductor – 8-BIT SINGLE CHIP MICROCOMPUTER

GMS 84512 / 84524
Control of Basic Interval Timer
Basic Interval Timer is Free Running Timer, but it can be cleared by setting BTCL ( Bit 3 of clock control
register). Initial state (after Reset) of BTCL is “0”, and if it is set to “1” it is auto-cleared after 1 machine cycle.
CLOCK CONTROL REGISTER
CKCTLR
<00CE_H>
W
W
W
W
W
W
W
W
7
6
5
4
3
2
1
0
-
- ^{WDTON ENPCK} BTCL BTS2 BTS1 BTS0
Initial value when MCU Reset
CKCTLR : [ --01 0111 ]
B.I.T. input clock selection
see Table 3.3.2
B.I.T. CLEAR ( When writing )
0 : B.I.T. Free-run
1 : B.I.T. Clear ( auto cleared after 1 machine cycle )
l Input clock selection of Basic Interval Timer and Reference Time interrupt interval
Input clock of Basic Interval Timer is selected by BTS2~BTS0(Bit2~0 of clock control register)among
the prescaler outputs. Reference time interval interrupt is generated by BIT overflow.
CLOCK CONTROL REGISTER
CKCTLR
<00CE_H>
W
W
W
W
W
W
W
W
7
6
5
4
3
2
1
0
-
- ^{WDTON ENPCK} BTCL BTS2 BTS1 BTS0
Initial value when MCU Reset
CKCTLR : [ --01 0111 ]
B.I.T. count value (When read)
B.I.T Input Clock Selection ( When writing )
TABLE 3.2.2 Input clock selection of Basic Interval Timer and reference time interrupt interval
(@4MHz)
BTS2
0
0
0
0
1
1
1
1
BTS1
0
0
1
1
0
0
1
1
BTS0
0
1
0
1
0
1
0
1
B.I.T. Input Clock Period
PS4 ( 2 u S )
PS5 ( 4 u S )
PS6 ( 8 u S )
PS7 ( 16 u S )
PS8 ( 32 u S )
PS9 ( 64 u S )
PS10 ( 128 u S )
PS11 ( 256 u S )
Reference Time Interrupt Period
512uS
1,024uS
2,048uS
4,096uS
8,192uS
16,384uS
32,768uS
65,536uS
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