GMS84512 Datasheet, PDF (38/123 Pages) Hynix Semiconductor – 8-BIT SINGLE CHIP MICROCOMPUTER

GMS 84512 / 84524
3.2.2 PRESCALER
Prescaler is consisted of 11-bit binary counter, and input clock is supplied by oscillation circuit.
Frequency divided output from each bit of prescaler is used as peripheral clock.
fex
PS2 PS3 PS4 PS5 PS6 PS7 PS8 PS9 PS10 PS11
ENPCK
PS21 PS2 PS3 PS4 PS5 PS6 PS7 PS8 PS9 PS10 PS11
8 _B.I.T.
11 _Peripheral
FIG. 3.2.3 Configuration of Prescaler
TABLE 3.2.1 Frequency-Divided Outputs of Prescaler
f_EX ( §Ö) PS1 PS2 PS3 PS4 PS5 PS6 PS7 PS8 PS9 PS10 PS11
4 ^{Interval 4 §Ö}
2 §Ö
Period 250nS 500 n S
1§Ö
1uS
500 § Õ 250 § Õ 125 § Õ 62.5 § Õ 31.25 § Õ 15.63 § Õ 7.18 § Õ 3.91 § Õ
2uS 4uS
8 u S 16 u S 32 u S 64 u S 128 u S 256 u S
6 ^{Interval 6§Ö}
3§Ö
1.5§Ö 750 §Õ 375 § Õ 187.5 § Õ 93.75 § Õ 46.88 § Õ 23.44 § Õ 11.72 § Õ 5.86 §
Period 166.7 n S 333.3 n S 666.7 n S 1.3 u S 2.7 u S 5.3 u S 10.7 u S 21.3 u S 42.7 u S 85.3 u S 170.7 u S
CLOCK CONTROL REGISTER
W
W
W
W
W
W
W
W
l
7
6
5
4
3
2
1
0
Initial value when MCU Reset
CKCTLR
<00CE_H>
-
- ^{WDTON ENPCK} BTCL BTS2 BTS1 BTS0
CKCTLR : [ --01 0111 ]
B.I.T. count value (When read)
WDT function control (When writing)
0 : 6bit TIMER
1 : WATCH-DOG TIMER
B.I.T input clock selection (When writing)
000 : PS4 ( 2 u S )
001 : PS5 ( 4 u S )
010 : PS6 ( 8 u S )
011 : PS7 ( 16 u S )
100 : PS8 ( 32u S )
101 : PS9 ( 64u S )
110 : PS10 ( 128uS )
111 : PS11 ( 256u S )
Peripheral Clock Enable ( When writing )
0 : Peripheral Clock Stop
1 : Peripheral Clock Supply
B.I.T. CLEAR ( When writing )
0 : B.I.T. FREE-RUN
1 : B.I.T. CLEAR ( Auto reset after 1-cycle )
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