GMS84512 Datasheet, PDF (19/123 Pages) Hynix Semiconductor – 8-BIT SINGLE CHIP MICROCOMPUTER

GMS 84512 / 84524
¨ ë Break Flag ( B )
l Set by BRK (S/W interrupt) instruction to distinguish BRK and TCALL instruction
having the same vector address.
¨ ì Direct Page Flag ( G )
l Assign direct page (0-page, 1-page).
l Set and cleared by SETG, CLRG instruction.
l If used with PG2R(00FC_H ) it is enable to access 2-page ( OSD RAM ).
G-flag
0
1
PG2R
-
0
1
Direct Page
0 - Page Access
1 - Page Access
2 - Page Access
*NOTICE : Always after clearing, PG2R is enable to be accessed for it is the register
of 0-page
¨ í Overflow Flag ( V )
l After operation, set when overflow or underflow occurs.
l In the case of BIT instruction, bit6 of memory location is input to V-flag.
l Cleared by CLRV instruction, but not set by any instruction.
l Branch condition flag of BVS, BVC.
¨ î Negative Flag ( N )
l N-flag is set whenever the result of a data transfer or operation is negative (bit7 isset to “1”).
l In the case of BIT instruction, bit7 of memory location is inputted to N-flag
l No CLEAR and SET instruction.
l Branch condition flag of BPL, BMI.
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