GMS84512 Datasheet, PDF (42/123 Pages) Hynix Semiconductor – 8-BIT SINGLE CHIP MICROCOMPUTER

GMS 84512 / 84524
l Control of WDT
WDTcan be used as 6-bit Timer or Watch Dog Timer according to WDTON ( Bit 5 of CKCTLR).
WDT is cleared by setting WDTCL (Bit 6 WDTR) to “1”.
< Notice >
1: After WDTON=1, maximum error of Timer is are one of period of IFBIT.
2: Because 6-bit counter begin to count after MCU Reset
the Watch Dog Timer should be enabled after clearing it.
CLOCK CONTROL REGISTER
CKCTLR
<00CE_H>
W
W
W
W
W
W
W
W
7
6
5
4
3
2
1
0
-
- ^{WDTON ENPCK} BTCL BTS2 BTS1 BTS0
WDT control (When writing)
0 : 6-bit Timer
1 : Watch-Dog Timer
Initial value when MCU Reset
CKCTLR : [ --01 0111 ]
WATCH-DOG TIMER REGISTER
WDTR
<00CF_H>
-
W
W
W
W
W
W
W
7
6
5
4
3
2
1
0
-
WDTCL WDTR WDTR WDTR WDTR WDTR WDTR
5
4
3
2
1
0
Initial value when MCU Reset
[ -011 1111 ]
WDT CLEAR
0 : WDT Free-Run
1 : WDT CLEAR (Auto reset after 1 cycle )
Interval of WDT
IFWDT period= ( WDTR value )X( IFBIT interval )
l Interval of WDT Interrupt
Interval of WDT Interrupt is decided by Basic Interval Timer Interrupt an WDTR
That is, Interval of = ( WDTR value ) X ( IFBIT interval ).
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