GMS84512 Datasheet, PDF (83/123 Pages) Hynix Semiconductor – 8-BIT SINGLE CHIP MICROCOMPUTER

GMS 84512 / 84524
4.1.4 Software Interrupt
Software interrupt is interrupted by BRK instruction. In interrupt processing step I-Flag is
cleared. B-flag is setted.
Interrupt vector of BRK instruction is shared with the vector of table call 0,
when both instruction of BRK and TCALL 0 are used, each processing routine is executable
through looking at the contents at B-Flag.
There is no instruction to Reset B-Flag directly.
PSW
NVGBH I ZC
After BRK Instruction
¡ª ¡ª ¡ª 1 ¡ª 0 ¡ª ¡ª
BRK or TCALL0
B-Flag ?
0
1
BRK Interrupt Routine
TCALL 0 Routine
RTNI
RTN
FIG. 4.1.4 Execution of BRK/ TCALL0
4.1.4 Multiple Interrupt
If there is an interrupt, interrupt enable flag is automalically resetted entering the interrupt
service routine. After then, no interrupt is accepted. If EI instruction is executed, mask enable
bit becomes "1", and each enable bit can accept the interrupt as a reply to 1's interrupt request.
If multiple of interrupt request occurs at same time, the one with a higher priority is accepted
and the other with lower priority are retained.
4-7