GMS84512 Datasheet, PDF (49/123 Pages) Hynix Semiconductor – 8-BIT SINGLE CHIP MICROCOMPUTER

GMS 84512 / 84524
3.3.2 Operation of TIMER2, TIMER3
l T2 ( T3 ) is consisted of 8-bit Binary Up-Counter. If T2(T3) counter value become equal to
TDR2(TDR3) value, it is cleared to 00H and interrupt request (IFT2 or IFT3) is generated.
TDR2 VALUE
MATCH
MATCH
MATCH
T2 VALUE
00_H
Clear
Clear
Clear
IFT2
Interrupt
Interrupt
Interval Period
Interrupt
FIG 3.3.5 Operation of TIMER2 ( or TIMER3)
l Any of the PS2, PS4, PS6 or external event input can be selected as the clock source of T2
by bit1(T2SL1) and bit0(T2SL0) of TM0. Any of the PS2, PS4 external event input or
overflow of T2 can be selected as the clock source of T1 by bit5(T3SL1) and bit4(T3SL0) of
TM0. If input clock is selected as external event input (EC2 or EC3), T2 and T3 operates as
8-bit event counter.
l The operation of T2, T2 is controlled by bit3(T2ST), bit2(T2CN) and bit6(T3ST) of TM2.
controls count stop/start without clearing counter. T2ST and T3ST control count stop/start.
order to enable timer to count-up T2CN, T2ST and T3ST should become “1”, After clearing
T0,T1 in order to count-up. T2ST or T3ST should become “0” for a moment and return to “1”
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