GMS81C50 Datasheet, PDF (87/99 Pages) Hynix Semiconductor – 8-BIT SINGLE CHIP MICROCONTROLLERS

Appendix A. GMS800 Series Instruction
NO.
MNENONIC
79 EOR #imm
80 EOR dp
81 EOR dp + X
82 EOR !abs
83 EOR !abs + Y
84 EOR [ dp + X]
85 EOR [dp] + Y
86 EOR {X}
87 EOR1 M.bit
88 EOR1B M.bit
89 INC A
90 INC dp
91 INC dp + X
92 INC !abs
93 INC X
94 INC Y
95 INCW dp
96 JMP !abs
97 JMP [!abs]
98 JMP [dp]
99 LDA #imm
100 LDA dp
101 LDA dp + X
102 LDA !abs
103 LDA !abs + Y
104 LDA [dp + X]
105 LDA [dp]+Y
106 LDA {X}
107 LDA {X}+
108 LDC M.bit
109 LDCB M.bit
110 LDM dp,#imm
111 LDX #imm
112 LDX dp
113 LDX dp + Y
114 LDX !abs
115 LDY #imm
116 LDY dp
117 LDY dp + Y
118 LDY !abs
119 LDYA dp
120 LSR A
121 LSR dp
122 LSR dp + X
123 LSR !abs
OP
CODE
A4
A5
A6
A7
B5
96
97
94
AB
AB
88
89
99
98
8F
9E
9D
1B
1F
3F
C4
C5
C6
C7
D5
D6
D7
D4
DB
CB
CB
E4
1E
CC
CD
DC
3E
C9
D9
D8
7D
48
49
59
58
BYTE
NO.
2
2
2
3
3
2
2
1
3
3
1
2
2
3
1
1
2
3
3
2
2
2
2
3
3
2
2
1
1
3
3
3
2
2
2
3
2
2
2
3
2
1
2
2
3
CYCLE
NO
2
3
4
4
5
6
6
3
5
5
2
4
5
5
2
2
6
3
5
4
2
3
4
4
5
6
6
3
4
4
4
5
2
3
4
4
2
3
4
4
5
2
4
5
5
Exclusive OR
A ← A ⊕ (M)
OPERATION
Bit exclusive-OR C-flag : C ← C ⊕ (M.bit)
Bit exclusive-OR C-flag and NOT : C ← C ⊕ ∼(M.bit)
Increment
(M) ← (M) + 1
Increment memory pair : (dp+1)(dp) ← {(dp+1)(dp)} + 1
Unconditional jump
PC ← jump address
Load accumulator
A ← (M)
X-register auto-increment : A ← (M), X ← X + 1
Load C-flag : C ← (M.bit)
Load C-flag with NOT : C ← ~(M.bit)
Load memory with immediate data : (M) ← imm
Load X-register
X ← (M)
Load X-register
Y ← (M)
Load YA : YA ← (dp+1)(dp)
Logical shift right
76543210 C
"0"→ → → → → → → → → →
FLAG
NVGBHIZC
N-----Z-
-------C
-------C
N - - - - - ZC
N-----Z-
N-----Z-
--------
N-----Z-
-------C
-------C
--------
N-----Z-
N-----Z-
N-----Z-
N - - - - - ZC
A-4